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Wed, 10 Jan 2024 11:41:05 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 10 Jan 2024 03:40:55 -0800 From: Luo Jie To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH net-next 00/20] net: ethernet: Add qcom PPE driver Date: Wed, 10 Jan 2024 19:40:12 +0800 Message-ID: <20240110114033.32575-1-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: z3Hzf9LUPOgDMX764m98likxAW2pcZsy X-Proofpoint-GUID: z3Hzf9LUPOgDMX764m98likxAW2pcZsy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=0 mlxlogscore=841 clxscore=1011 priorityscore=1501 adultscore=0 impostorscore=0 phishscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401100095 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240110_034128_543680_8A6F590B X-CRM114-Status: GOOD ( 17.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PPE(packet process engine) hardware block is available in Qualcomm IPQ chipsets that support PPE architecture, such as IPQ9574 and IPQ5332. The PPE includes integrated ethernet MAC and PCS(uniphy), which is used to connect with external PHY devices by PCS. The PPE also includes various packet processing offload capabilities such as routing and briding offload, L2 switch capability, VLAN and tunnel processing offload. This patch series enables support for the PPE driver which intializes and configures the PPE, and provides various services for higher level network drivers in the system such as EDMA (Ethernet DMA) driver or a DSA switch driver for PPE L2 Switch, for Qualcomm IPQ SoCs. The PPE driver provides following functions: 1. Initialize PPE device hardware functions such as buffer management, queue management, TDM, scheduler and clocks in order to bring up PPE device. 2. Register the PCS driver and uniphy raw clock provider. The uniphy raw clock is selected as the parent clock of the NSSCC clocks. The NSSCC clocks are registered by the dependent patchset at the link below.(Note: There are 3 PCS on IPQ9574, 2 PCS on IPQ5332 platform.) 3. Export the PPE control path API (ppe_device_ops) for use by higher level network drivers such as the EDMA(Ethernet DMA) driver. The EDMA netdevice driver depends on this PPE driver and registers the netdevices to receive and transmit packets using the ethernet ports. 4. Register debugfs file to provide access to various PPE packet counters. These statistics are recorded by the various HW counters, such as port RX/TX, CPU code and HW queue counters. The diagram and detail introduction of PPE are described in the added file: Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst, which is added by the first patch. . PPE driver depends on the NSSCC clock driver below, which provides the clocks for the PPE driver. https://lore.kernel.org/linux-arm-msm/20230825091234.32713-1-quic_devipriy@quicinc.com/ https://lore.kernel.org/linux-arm-msm/20231211-ipq5332-nsscc-v3-0-ad13bef9b137@quicinc.com/ PPE driver also depens on the device tree patch series to bring up PPE device as below link. https://lore.kernel.org/all/20240110112059.2498-1-quic_luoj@quicinc.com/ Lei Wei (5): Documentation: networking: qcom PPE driver documentation net: ethernet: qualcomm: Add PPE L2 bridge initialization net: ethernet: qualcomm: Add PPE UNIPHY support for phylink net: ethernet: qualcomm: Add PPE MAC support for phylink net: ethernet: qualcomm: Add PPE MAC functions Luo Jie (15): dt-bindings: net: qcom,ppe: Add bindings yaml file net: ethernet: qualcomm: Add qcom PPE driver net: ethernet: qualcomm: Add PPE buffer manager configuration net: ethernet: qualcomm: Add PPE queue management config net: ethernet: qualcomm: Add PPE TDM config net: ethernet: qualcomm: Add PPE port scheduler resource net: ethernet: qualcomm: Add PPE scheduler config net: ethernet: qualcomm: Add PPE queue config net: ethernet: qualcomm: Add PPE service code config net: ethernet: qualcomm: Add PPE port control config net: ethernet: qualcomm: Add PPE RSS hash config net: ethernet: qualcomm: Export PPE function set_maxframe net: ethernet: qualcomm: Add PPE AC(admission control) function net: ethernet: qualcomm: Add PPE debugfs counters arm64: defconfig: Enable qcom PPE driver .../devicetree/bindings/net/qcom,ppe.yaml | 1330 +++++++ .../device_drivers/ethernet/index.rst | 1 + .../ethernet/qualcomm/ppe/ppe.rst | 305 ++ MAINTAINERS | 9 + arch/arm64/configs/defconfig | 1 + drivers/net/ethernet/qualcomm/Kconfig | 17 + drivers/net/ethernet/qualcomm/Makefile | 1 + drivers/net/ethernet/qualcomm/ppe/Makefile | 7 + drivers/net/ethernet/qualcomm/ppe/ppe.c | 3070 +++++++++++++++++ drivers/net/ethernet/qualcomm/ppe/ppe.h | 315 ++ .../net/ethernet/qualcomm/ppe/ppe_debugfs.c | 953 +++++ .../net/ethernet/qualcomm/ppe/ppe_debugfs.h | 25 + drivers/net/ethernet/qualcomm/ppe/ppe_ops.c | 628 ++++ drivers/net/ethernet/qualcomm/ppe/ppe_ops.h | 256 ++ drivers/net/ethernet/qualcomm/ppe/ppe_regs.h | 1106 ++++++ .../net/ethernet/qualcomm/ppe/ppe_uniphy.c | 789 +++++ .../net/ethernet/qualcomm/ppe/ppe_uniphy.h | 227 ++ include/linux/soc/qcom/ppe.h | 105 + 18 files changed, 9145 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ppe.yaml create mode 100644 Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst create mode 100644 drivers/net/ethernet/qualcomm/ppe/Makefile create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe.c create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe.h create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_ops.c create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_ops.h create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_regs.h create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_uniphy.c create mode 100644 drivers/net/ethernet/qualcomm/ppe/ppe_uniphy.h create mode 100644 include/linux/soc/qcom/ppe.h base-commit: a7fe0881d9b78d402bbd9067dd4503a57c57a1d9