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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id bw13-20020a170906c1cd00b00a58de09fd92sm5425674ejb.27.2024.05.01.02.19.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 May 2024 02:19:36 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Subject: [PATCH v2 0/7] USB31DRD phy support for Google Tensor gs101 (HS & SS) Date: Wed, 01 May 2024 10:19:35 +0100 Message-Id: <20240501-usb-phy-gs101-v2-0-ed9f14a1bd6d@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIACcJMmYC/3XMywrCMBCF4Vcps3YkkwQKrnwP6SKXaTogTUm0W Erf3di9y//A+XaoXIQr3LodCq9SJc8t9KWDMLk5MUpsDVppq6w2+K4el2nDVEkROj8apl5HChb aZyk8yuf0HkPrSeorl+3kV/qt/6SVUCH7GLxxgXob70+ZXcnXXBIMx3F8Aa6V3tGrAAAA To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Marek Szyprowski , Sylwester Nawrocki , Alim Akhtar , Sam Protsenko Cc: Krzysztof Kozlowski , Tudor Ambarus , Will McVicker , Roy Luo , kernel-team@android.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Krzysztof Kozlowski , Arnd Bergmann , lee@kernel.org, =?utf-8?q?Andr=C3=A9_Draszi?= =?utf-8?q?k?= X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240501_021944_321813_A8DC477B X-CRM114-Status: GOOD ( 14.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch series adds support for the Exynos USB 3.1 DRD combo phy, as found in Exynos 9 SoCs like Google GS101. It supports USB SS, HS and DisplayPort, but DisplayPort is out of scope for this series. In terms of UTMI+, this is very similar to the existing Exynos850 support in this driver. The difference is that it supports both UTMI+ (HS) and PIPE3 (SS). Firstly, there are some preparatory patches to simplify addition, while the bulk of the changes is around the SS part. This version doesn't change anything around Krzysztof's comments regarding syscon- vs Exynos-specific PMU APIs, but I wanted to post a version with at least the simple fixes that are necessary as well applied. Signed-off-by: André Draszik --- Changes in v2: - avoid having nested else/if in the DT binding (Rob) - add missing bitfield.h include - Link to v1: https://lore.kernel.org/r/20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@linaro.org --- André Draszik (7): dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle() for PMU regs phy: exynos5-usbdrd: support isolating HS and SS ports independently phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() phy: exynos5-usbdrd: uniform order of register bit macros phy: exynos5-usbdrd: convert to clk_bulk for phy (register) access phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS) .../bindings/phy/samsung,usb3-drd-phy.yaml | 61 +- drivers/phy/samsung/Kconfig | 1 - drivers/phy/samsung/phy-exynos5-usbdrd.c | 754 +++++++++++++++++++-- include/linux/soc/samsung/exynos-regs-pmu.h | 4 + 4 files changed, 756 insertions(+), 64 deletions(-) --- base-commit: d04466706db5e241ee026f17b5f920e50dee26b5 change-id: 20240423-usb-phy-gs101-abf3e172d1c4 Best regards,