From patchwork Thu May 23 18:04:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Delaunay X-Patchwork-Id: 13672150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7D59C25B75 for ; Thu, 23 May 2024 18:05:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=dT0bhFy8BjKTqSJsVFeMh6p1vtmX5dZ4uEekbC12Blk=; b=GWAANpqsp4JU92 kHOEraHuJp7nlQNTdvrgEgLFsvHoGs1cVcwpbo1Ijlhn4DBkm/E9WMaRwqEf0hoE7oHGUWMcAV0yE NqC6pjGoeX4Afr+tVVs+VOPBQllHrm/gAW8Pm75R9hL5L7robkyuTHayQ5j1bm4/S+X0bphBbS3uy /HnuAaI3KRvkFklGuTrZMuFxyNJWbtE6qMcClH0+hGddA29V22YrOvyIREjPekGNu/jEbYXebzsWP Hh6AmRy0710pHKgstUiVFvyh5AtPt+9jHvZINeZHx0rDOQ470IDsQnkPJdpIYR8iFkFj649/8tbHy AV7UdCnf9VUnH/a/b86w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sACp0-00000006yIC-1aJz; Thu, 23 May 2024 18:05:46 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sACov-00000006yGb-1MCF for linux-arm-kernel@lists.infradead.org; Thu, 23 May 2024 18:05:43 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44NHUR7w016252; Thu, 23 May 2024 20:05:28 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=selector1; bh=DH8LgcGQni+MPZrykXYaYa wW21NSo9zAq2v3pQC/Wms=; b=g71+vPPcNMk3qJKETtWwdKKi3gp8Dwm7pTkEcu UlqyHB+nc2XPNi9vnomYZq41Rt1R46bUbfgmDDDmuJOJuzxcqDnX5JgoHTItoWWU pIjSUWR2QSwXZgp0jlemCelUplSbaBBe2tRnlcXstdwZk62yxa5IKTUYhvjknISh 5lZ9o2fFBOt6wRUaSf/k9tjO9ZTfmbBPmNPlmy5ZbnHC8AMDYep/jDSzDZHTj8At WV0t5Xm+JaepV8oI7naOiL+iDw+TLi0MEWXOFgIemQx9FBPcNvhPvq3e35yjU3hw uPZyNLZ9pn9B8x2pTItfbwvgKuENX6SKg5cQlpVznrF9omdg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3yaa8qg2h8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 May 2024 20:05:28 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A084E4002D; Thu, 23 May 2024 20:05:24 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 412EC21BF58; Thu, 23 May 2024 20:04:38 +0200 (CEST) Received: from localhost (10.48.87.205) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 23 May 2024 20:04:37 +0200 From: Patrick Delaunay To: Alexandre TORGUE , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Pascal Paillet CC: Marek Vasut , Patrick Delaunay , , , , Subject: [PATCH v4 0/2] ARM: st: add new compatible for PWR regulators on STM32MP13 Date: Thu, 23 May 2024 20:04:32 +0200 Message-ID: <20240523180435.583257-1-patrick.delaunay@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.48.87.205] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-23_11,2024-05-23_01,2024-05-17_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240523_110541_708514_BBD83CEF X-CRM114-Status: GOOD ( 14.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds the new PWR regulators compatible for STM32MP13: "st,stm32mp13-pwr-reg". As this node is just introduced by [1] and it is is not used by any board in Linux, it is the good time to introduced this compatible and update the STM32MP13 SoC dtsi without ABI break. A new compatible is needed as the content of the PWR_CR3 register, used by this driver change with new bits on STM32MP13 for SD IO domain: - bit 23: VDDSD2VALID - bit 22: VDDSD1VALID - bit 16: VDDSD2RDY - bit 15: VDDSD2EN - bit 14: VDDSD1RDY - bit 13: VDDSD1EN I will push a update on STM32MP13 SoC dtsi if this new compatible is accepted to preserve the bisectability. [1] commit f798f7079233 ("ARM: dts: stm32: add PWR regulators support on stm32mp131") https://lore.kernel.org/linux-arm-kernel/b89d0531-067f-4356-91b0-ed7434cee3d7@foss.st.com/ Changes in v4: - use fallback as proposed by Marek on V3 for STM32MP13: compatible = "st,stm32mp13-pwr-reg", "st,stm32mp1,pwr-reg" Changes in v3: - Replace oneOf/const by enum; solve the V2 issues for dt_binding_check Changes in v2: - Add new compatible for STM32MP13 and change title after Rob remarks V1: "ARM: st: use a correct pwr compatible for stm32mp15" Patrick Delaunay (2): dt-bindings: regulator: st,stm32mp1-pwr-reg: add compatible for STM32MP13 regulator: stm32-pwr: add support of STM32MP13 .../devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml | 7 ++++++- drivers/regulator/stm32-pwr.c | 1 + 2 files changed, 7 insertions(+), 1 deletion(-)