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Tue, 2 Jul 2024 19:15:00 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 2 Jul 2024 12:14:55 -0700 From: Sibi Sankar To: , , , , , CC: , , , , , , , Subject: [RFC V3 0/4] arm_scmi: vendors: ARM SCMI Qualcomm Vendor Protocol Date: Wed, 3 Jul 2024 00:44:36 +0530 Message-ID: <20240702191440.2161623-1-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Vg1xrHgIBoO5Uc7t3GMN6O2sU1H1fyvk X-Proofpoint-ORIG-GUID: Vg1xrHgIBoO5Uc7t3GMN6O2sU1H1fyvk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-02_14,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 mlxscore=0 clxscore=1011 phishscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407020140 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_121511_047582_437975E9 X-CRM114-Status: GOOD ( 20.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SCMI QCOM vendor protocol provides a generic way of exposing a number of Qualcomm SoC specific features (like memory bus scaling) through a mixture of pre-determined algorithm strings and param_id pairs hosted on the SCMI controller. Introduce a client driver that uses the memlat algorithm string hosted on QCOM SCMI Vendor Protocol to detect memory latency workloads and control frequency/level of the various memory buses (DDR/LLCC/DDR_QOS). Generic QCOM Vendor protocol background: It was found that a lot of the vendor protocol used internally was for debug/internal development purposes that would either be super SoC specific or had to be disabled because of some features being fused out during production. This lead to a large number of vendor protocol numbers being quickly consumed and were never released either. Using a generic vendor protocol with functionality abstracted behind algorithm strings gave us the flexibility of allowing such functionality exist during initial development/debugging while still being able to expose functionality like memlat once they have matured enough. The param-ids are certainly expected to act as ABI for algorithms strings like MEMLAT. Thanks in advance for taking time to review the series. Opens: * opp-tables are used but they don't get to be added to the scmi device (thus we rely on a lot of manual parsing) because the memlat client driver doesn't vote on these resources clocks/interconnects/power-domain from the kernel and some of the resources aren't modeled in the first place like DDR_QOS. To Dos: * More documentation [Sudeep/Dmitry/Konrad] * Use alternate bindings instead of freq-table-Hz. [Dmitry] * Prevent duplication of code using vendor protocol driver. [Dmitry] V2: * Drop container dvfs memlat container node. [Rob] * Move scmi-memlat.yaml to protocol level given that a lot of vendors might end up using the same protocol number. [Rob] * Replace qcom,cpulist with the standard "cpus" property. [Rob] * Fix up compute-type/ipm-ceil required. [Rob] * Make driver changes to the accommodate bindings changes. [Rob] * Minor fixups in subjects/coverletter. * Minor style fixes in dts. V1: * Add missing bindings for the protocol. [Konrad/Dmitry] * Use alternate bindings. [Dmitry/Konrad] * Rebase on top of Cristian's "SCMI multiple vendor protocol support" series. [Cristian] * Add more documentation wherever possible. [Sudeep] * Replace pr_err/info with it's dev equivalents. * Mixed tabs and initialization cleanups in the memlat driver. [Konrad] * Commit message update for the memlat driver. [Dmitry] * Cleanups/Fixes suggested for the client driver. [Dmitry/Konrad/Cristian] * Use opp-tables instead of memfreq-tbl. [Dmitry/Konrad] * Detect physical cpu to deal with variants with reduced cpu count. * Add support for DDR_QOS mem_type. Sibi Sankar (4): dt-bindings: firmware: Document bindings for ARM SCMI QCOM Vendor Protocol firmware: arm_scmi: vendors: Add ARM SCMI QCOM vendor protocol v1.0 soc: qcom: Introduce SCMI based Memlat (Memory Latency) governor arm64: dts: qcom: x1e80100: Enable LLCC/DDR/DDR_QOS dvfs .../bindings/firmware/arm,scmi.yaml | 15 + .../bindings/soc/qcom/qcom,scmi-memlat.yaml | 242 ++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 138 +++++ drivers/firmware/arm_scmi/vendors/Kconfig | 12 + drivers/firmware/arm_scmi/vendors/Makefile | 2 +- .../arm_scmi/vendors/qcom_scmi_vendor.c | 184 ++++++ drivers/soc/qcom/Kconfig | 12 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qcom_scmi_client.c | 583 ++++++++++++++++++ include/dt-bindings/soc/qcom,scmi-vendor.h | 22 + include/linux/qcom_scmi_vendor.h | 39 ++ 11 files changed, 1249 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,scmi-memlat.yaml create mode 100644 drivers/firmware/arm_scmi/vendors/qcom_scmi_vendor.c create mode 100644 drivers/soc/qcom/qcom_scmi_client.c create mode 100644 include/dt-bindings/soc/qcom,scmi-vendor.h create mode 100644 include/linux/qcom_scmi_vendor.h