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[0/4] address several S32G2/S32G3 SoC based boards particularities

Message ID 20240704132116.2865864-1-ciprianmarian.costea@oss.nxp.com (mailing list archive)
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Series address several S32G2/S32G3 SoC based boards particularities | expand

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Ciprian Costea July 4, 2024, 1:21 p.m. UTC 
This patchset addresses several S32G2/S32G3 SoC based boards
uSDHC controller particularities such as:
- GPIO card detect wake mechanism is not available
- Changing the pinctrl state in suspend routine is not supported

It also fixes a clocking usage issue on 'clk_get_rate',
in case of 'per' clock.

Ciprian Costea (4):
  mmc: sdhci-esdhc-imx: disable card detect wake for S32G based
    platforms
  mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement
  mmc: sdhci-esdhc-imx: add option to not change pinctrl state in
    suspend
  MAINTAINERS: add 's32@nxp.com' as relevant mailing list for
    'sdhci-esdhc-imx' driver

 MAINTAINERS                        |  1 +
 drivers/mmc/host/sdhci-esdhc-imx.c | 28 ++++++++++++++++++++++------
 2 files changed, 23 insertions(+), 6 deletions(-)