Message ID | 20240708121018.246476-1-ciprianmarian.costea@oss.nxp.com (mailing list archive) |
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bh=ALAXGEdIxJJcDfoxtYGEY98v8Un5fU5EAFyBJf+Z7UE=; b=Z41vwS8CmQQWY7bYR7CMjPRtI6UIX8wFaFK2L5mSUToljUPF91ydg44YF5b1gG4ytkseItfoK84wlvu91A6NGyU1IKQ56LQfZXHDBqUPj+aVVhEwgEQpPF1Z9BohwUNywL6syXvk9+ztNq7C6CjCQ1Hi011rhqgp0nxNFirsvoY= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from DU0PR04MB9251.eurprd04.prod.outlook.com (2603:10a6:10:352::15) by VI0PR04MB10614.eurprd04.prod.outlook.com (2603:10a6:800:260::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7741.35; Mon, 8 Jul 2024 12:10:22 +0000 Received: from DU0PR04MB9251.eurprd04.prod.outlook.com ([fe80::708f:69ee:15df:6ebd]) by DU0PR04MB9251.eurprd04.prod.outlook.com ([fe80::708f:69ee:15df:6ebd%5]) with mapi id 15.20.7741.033; Mon, 8 Jul 2024 12:10:22 +0000 From: Ciprian Costea <ciprianmarian.costea@oss.nxp.com> To: Haibo Chen <haibo.chen@nxp.com>, Adrian Hunter <adrian.hunter@intel.com>, Ulf Hansson <ulf.hansson@linaro.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com> Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, s32@nxp.com, Ciprian Costea <ciprianmarian.costea@oss.nxp.com> Subject: [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities Date: Mon, 8 Jul 2024 15:10:15 +0300 Message-ID: <20240708121018.246476-1-ciprianmarian.costea@oss.nxp.com> X-Mailer: git-send-email 2.45.2 Content-Type: text/plain; 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address S32G2/S32G3 SoC based boards particularities
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On Mon, 8 Jul 2024 at 14:10, Ciprian Costea <ciprianmarian.costea@oss.nxp.com> wrote: > > This patchset addresses S32G2/S32G3 SoC based boards > uSDHC controller particularities such as: > - GPIO card detect wake mechanism is not available > > It also fixes a clocking usage issue on 'clk_get_rate', > in case of 'per' clock. > > Changes in v2: > - Dropped option to not change pinctrl during PM. > Instead, when S32G2/S32G3 uSDHC pinctrl entries will be > upstream'ed, 'sleep' pinctrl will not be defined. > > Ciprian Costea (3): > mmc: sdhci-esdhc-imx: disable card detect wake for S32G based > platforms > mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement > MAINTAINERS: add 's32@nxp.com' as relevant mailing list for > 'sdhci-esdhc-imx' driver > > MAINTAINERS | 1 + > drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++--- > 2 files changed, 14 insertions(+), 3 deletions(-) > Applied for next, thanks! Kind regards Uffe