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Wed, 11 Sep 2024 15:26:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726068390; bh=ySbiEt3ATot0IO6ukCbLnsXhtNtXL/Guqo5EQ5kc+vU=; h=From:Subject:Date:To:Cc:Reply-To:From; b=tgZUt2GpwqvGKS8TVUDJgwk2znhaYjDppzRhhC1rESibZwxWXWmC/9K8la/KxGTgs PQJFV88220I30DP3gUnlDe+DQ5ZuSqQqzZp9849QAT6ewKpQfTiZHfUBwIhqzsIGVv jkvHNRImk1gFNC4PXrHrMyTAjbipQWpvKzPRZ7qiEmkSjznJr+/PDUVNgBo5VlbjHF 0QfYnA3nMkYNwZqX9ZBN6JafRdKL3TDsmVJe+Px+csnzJajmRmYsCWsnGnFHDqygoQ RQmX1T9e25Jt0L8v5FQ1GSxPCOgO3LbHfIfKIIH3uv2ejmNdr+0fq1xa8mlfWulQG2 4NMtby9jeU7FQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E02FEE0213; Wed, 11 Sep 2024 15:26:30 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Subject: [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Date: Wed, 11 Sep 2024 20:56:25 +0530 Message-Id: <20240911-pci-qcom-gen4-stability-v7-0-743f5c1fd027@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; 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b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBm4baiuGrwKvXu8Vn7676IMqAa3SnFAiqeGWP15 rRv9Ot+Y++JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZuG2ogAKCRBVnxHm/pHO 9UAfB/wJn1xjr7gpcV5/74TYwbz4d8AOHHZh693NV+oSlBCpL1toQgQA6Abx1BqGLKNL0IlJY/L rKzJQhYDg8Dfz/eoLnJzC+bJmxV9Wtj8pbu2tmzKMCT8OrsclFUjUQVzr5JfOB3XHP2YmrUj0iw OiIhvy8iI7GZ2Ju8zl9rz8boWOjblFZ/gsk29ZJHdsJNprELyoa9F/PXGYb8piL6/7GqidWpwGY UboBRSx/kcLZVbCcPVI6TC/NYBpy7puAdX28RpatQCTJ3KL1164J9ColLZfAdepBd+PgFan4SiB mzDQ73C3/r3ohaO47FhOVVKgNaYDfuKWy45U2RZLtyJRJPtC X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240911_082633_416103_0AE76002 X-CRM114-Status: GOOD ( 15.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: manivannan.sadhasivam@linaro.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series adds 16.0 GT/s specific equalization and RX lane margining settings to the Qcom RC and EP drivers. This series is mandatory for the stable operation of the PCIe link at 16.0 GT/s on the Qcom platforms. NOTE: ===== I've taken over the series from Shashank based on the discussion [1]. In order to apply the equalization/margining settings properly in the Qcom driver, I added the first 2 patches to the series which inevitably touches other vendor drivers also. - Mani Changes in v7: - Fixed the build issue reported by Kbuild bot in patch 1/4 - Changed the logic to check invalid max_link_speed in patch 2/4 - Cleanups to patches 3/4 and 4/4 as suggested by Johan - Added include header guard to pci-qcom-common.h - Link to v6: https://lore.kernel.org/r/20240904-pci-qcom-gen4-stability-v6-0-ec39f7ae3f62@linaro.org Changes in v6: - Dropped the code refactoring patch as suggested by Johan - Added 2 patches to fix the caching of maximum supported link speed value that is needed to apply the equalization/margining settings - Updated the commit message of patch 3 as per Bjorn's suggestion For previous changelogs, please refer [2] [1] https://lore.kernel.org/linux-pci/af65b744-7538-4929-9ab4-8ee42e17b8d1@quicinc.com/ [2] https://lore.kernel.org/linux-pci/20240821170917.21018-1-quic_schintav@quicinc.com/ Signed-off-by: Manivannan Sadhasivam --- Manivannan Sadhasivam (2): PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed Shashank Babu Chinta Venkata (2): PCI: qcom: Add equalization settings for 16.0 GT/s PCI: qcom: Add RX lane margining settings for 16.0 GT/s MAINTAINERS | 4 +- drivers/pci/controller/dwc/Kconfig | 5 ++ drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pci-imx6.c | 8 +-- drivers/pci/controller/dwc/pcie-designware.c | 22 +++++--- drivers/pci/controller/dwc/pcie-designware.h | 33 +++++++++++- drivers/pci/controller/dwc/pcie-intel-gw.c | 4 +- drivers/pci/controller/dwc/pcie-qcom-common.c | 78 +++++++++++++++++++++++++++ drivers/pci/controller/dwc/pcie-qcom-common.h | 14 +++++ drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 +++ drivers/pci/controller/dwc/pcie-qcom.c | 6 +++ drivers/pci/controller/dwc/pcie-rcar-gen4.c | 6 +-- drivers/pci/controller/dwc/pcie-spear13xx.c | 2 +- drivers/pci/controller/dwc/pcie-tegra194.c | 19 +++---- 14 files changed, 178 insertions(+), 30 deletions(-) --- base-commit: 47ac09b91befbb6a235ab620c32af719f8208399 change-id: 20240904-pci-qcom-gen4-stability-02ec65a7e6e4 Best regards,