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[175.159.121.22]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-719090d11e6sm2156984b3a.205.2024.09.10.22.08.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2024 22:08:14 -0700 (PDT) From: Nick Chan To: Krzysztof Kozlowski , Alim Akhtar , Greg Kroah-Hartman , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: asahi@lists.linux.dev, Nick Chan Subject: [PATCH v5 0/3] tty: serial: samsung: Serial fixes for Apple A7-A11 SoCs Date: Wed, 11 Sep 2024 13:02:10 +0800 Message-ID: <20240911050741.14477-1-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240910_220816_104357_8B4B5797 X-CRM114-Status: GOOD ( 12.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series fixes issues with serial on A7-A11 SoCs. The changes do not seem to affect existing M1 and up users so they can be applied unconditionally. Firstly, these SoCs require 32-bit writes on the serial port. This only manifested in earlycon as reg-io-width in device tree is consulted for normal serial writes. Secondly, A7-A9 SoCs seems to use different bits for RXTO and RXTO enable. Accessing these bits in addition to the original RXTO and RXTO enable bits will allow serial rx to work correctly on those SoCs. Changes in v5: - Convert existing APPLE_S5L_* entries to use GENMASK() macro in addition to BIT(), as suggested by Andi. Changes in v4: - Removed fake Reviewed-by tag added by accident... need to stop making stupid mistakes that wastes everyone's time. The remaining Reviewed-by is real as far as I am aware. Changes in v3: - v2 did not declare itself as v2 in subject line... resend as v3. Changes in v2: - Mention A7-A11 in the comment about changing register accesses to MMIO32. - Use BIT() macro for new entries, and change the existing APPLE_S5L_* entries for consistency. v1: https://lore.kernel.org/linux-samsung-soc/20240907111431.2970-1-towinchenmi@gmail.com v2: https://lore.kernel.org/linux-samsung-soc/20240908075904.12133-1-towinchenmi@gmail.com v3: https://lore.kernel.org/linux-samsung-soc/20240908090939.2745-1-towinchenmi@gmail.com v4: https://lore.kernel.org/linux-samsung-soc/20240909084222.3209-1-towinchenmi@gmail.com/ Nick Chan --- Nick Chan (3): tty: serial: samsung: Use bit manipulation macros for APPLE_S5L_* tty: serial: samsung: Fix A7-A11 serial earlycon SError tty: serial: samsung: Fix serial rx on Apple A7-A9 drivers/tty/serial/samsung_tty.c | 22 ++++++++++++++++------ include/linux/serial_s3c.h | 24 ++++++++++++++---------- 2 files changed, 30 insertions(+), 16 deletions(-) base-commit: 6708132e80a2ced620bde9b9c36e426183544a23