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[v6,0/7] Add NSS clock controller support for IPQ9574

Message ID 20241004080332.853503-1-quic_mmanikan@quicinc.com (mailing list archive)
Headers show
Series Add NSS clock controller support for IPQ9574 | expand

Message

Manikanta Mylavarapu Oct. 4, 2024, 8:03 a.m. UTC 
Add bindings, driver and devicetree node for networking sub system clock 
controller on IPQ9574. Also add support for NSS Huayra type alpha PLL
and add support for gpll0_out_aux clock which serves as the parent for 
some nss clocks.

Changes in V6:
	- Detailed change logs are added to the respective patches.

V5 can be found at:
https://lore.kernel.org/linux-arm-msm/20240626143302.810632-1-quic_devipriy@quicinc.com/

V4 can be found at:
https://lore.kernel.org/linux-arm-msm/20240625070536.3043630-1-quic_devipriy@quicinc.com/

V3 can be found at:
https://lore.kernel.org/linux-arm-msm/20240129051104.1855487-1-quic_devipriy@quicinc.com/

V2 can be found at:
https://lore.kernel.org/linux-arm-msm/20230825091234.32713-1-quic_devipriy@quicinc.com/

Devi Priya (7):
  clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574
  dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
  clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
  dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
  clk: qcom: Add NSS clock Controller driver for IPQ9574
  arm64: dts: qcom: ipq9574: Add nsscc node
  arm64: defconfig: Build NSS Clock Controller driver for IPQ9574

 .../bindings/clock/qcom,ipq9574-nsscc.yaml    |   74 +
 arch/arm64/boot/dts/qcom/ipq9574.dtsi         |   23 +
 arch/arm64/configs/defconfig                  |    1 +
 drivers/clk/qcom/Kconfig                      |    7 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/clk-alpha-pll.c              |   11 +
 drivers/clk/qcom/clk-alpha-pll.h              |    1 +
 drivers/clk/qcom/gcc-ipq9574.c                |   15 +
 drivers/clk/qcom/nsscc-ipq9574.c              | 3084 +++++++++++++++++
 include/dt-bindings/clock/qcom,ipq9574-gcc.h  |    1 +
 .../dt-bindings/clock/qcom,ipq9574-nsscc.h    |  152 +
 .../dt-bindings/reset/qcom,ipq9574-nsscc.h    |  134 +
 12 files changed, 3504 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
 create mode 100644 drivers/clk/qcom/nsscc-ipq9574.c
 create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h
 create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h

Comments

Manikanta Mylavarapu Oct. 4, 2024, 9:52 a.m. UTC | #1 
On 10/4/2024 1:33 PM, Manikanta Mylavarapu wrote:
> Add bindings, driver and devicetree node for networking sub system clock 
> controller on IPQ9574. Also add support for NSS Huayra type alpha PLL
> and add support for gpll0_out_aux clock which serves as the parent for 
> some nss clocks.
> 
> Changes in V6:
> 	- Detailed change logs are added to the respective patches.
> 

I missed to update few things. I will post V7, please ignore V6.

Thanks & Regards,
Manikanta.