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AJvYcCUGMH36mDNCh6Ltj3RzmwJ0MBI8WpV3upbE8jocIzXY8dpQK/TjX78WnMW2KEUPy4L+NikiFi8Ay5skguWc8UfI@lists.infradead.org X-Gm-Message-State: AOJu0YxoS9w3KiedW8grzppQqS+XnQ+n/bw2yvgIZEu+EzhtBjnvGECl 397bx8NHFQR8Q4BtHeg2hIW8bCCHKw3DWr8KnmfwL1sdf73HGHVSVIq1EdH7KFs= X-Google-Smtp-Source: AGHT+IEeMhO6fUKVIbKTf4VnCOrvoZB22wDG7bl6QGgOlpgFEmq4KFG93SWLtdJkWZFjghfjiEZPNg== X-Received: by 2002:a05:6a21:33aa:b0:1cf:2be2:668c with SMTP id adf61e73a8af0-1d92c58dc9amr6387836637.12.1729479590211; Sun, 20 Oct 2024 19:59:50 -0700 (PDT) Received: from ubuntu.huaqin.com ([116.66.212.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71ec1313fb5sm1815601b3a.7.2024.10.20.19.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 19:59:50 -0700 (PDT) From: Zhengqiao Xia To: devicetree@vger.kernel.or, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, sean.wang@mediatek.com, Zhengqiao Xia Subject: [PATCH v3 0/4] arm64: dts: mediatek: Add MT8186 Chinchou Date: Mon, 21 Oct 2024 10:59:34 +0800 Message-Id: <20241021025938.676-1-xiazhengqiao@huaqin.corp-partner.google.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241020_195951_915749_76455A98 X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is v3 of the MT8186 Chromebook device tree series to support MT8186 chinchou platform. It is based on the "corsola" design. It includes chinchou and chinchou360, including LTE, stylus, touchscreen combinations. Changes in v3: - Add a patch to change codec in pmic (in mt8186-corsola.dtsi) to audio-codec - Link to v2: https://lore.kernel.org/all/20241018091135.17075-1-xiazhengqiao@huaqin.corp-partner.google.com/ Changes in v2: - Modify location of "const: google,chinchou-sku17" in mediatek.yaml - rename "pin-report" to "pin-report-pins" - add "vcc33-supply" and "vcc33-supply" - rename "cbj-sleeve-gpio" to "cbj-sleeve-gpios" - modify subnode of sound - Link to v1: https://lore.kernel.org/all/172900161180.733089.8963543745385219831.robh@kernel.org/ Zhengqiao Xia (4): dt-bindings: arm: mediatek: Add MT8186 Chinchou Chromebook arm64: dts: mediatek: Add MT8186 Chinchou Chromebooks arm64: dts: mediatek: Add exton node for DP bridge arm64: dts: mediatek: Modify audio codec name for pmic .../devicetree/bindings/arm/mediatek.yaml | 28 ++ arch/arm64/boot/dts/mediatek/Makefile | 3 + .../mediatek/mt8186-corsola-chinchou-sku0.dts | 18 + .../mediatek/mt8186-corsola-chinchou-sku1.dts | 35 ++ .../mt8186-corsola-chinchou-sku16.dts | 29 ++ .../dts/mediatek/mt8186-corsola-chinchou.dtsi | 321 ++++++++++++++++++ .../boot/dts/mediatek/mt8186-corsola.dtsi | 8 +- 7 files changed, 441 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku0.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku1.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou-sku16.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-corsola-chinchou.dtsi