Message ID | 20241028-arm-psci-system_reset2-vendor-reboots-v7-0-a4c40b0ebc54@quicinc.com (mailing list archive) |
---|---|
Headers | show
Return-Path: <linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A47FDD3E2A0 for <linux-arm-kernel@archiver.kernel.org>; Mon, 28 Oct 2024 18:48:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To: Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=FFpEevja3y6wKaFfcKqCGL7fQ+TPELn6XQKMoqKg3lA=; b=aDW7iGnxGcdWhD x6KS2syfniy1xFvDIi9KZh4boG4w0RqkuzfcWk2yuINbTD+HRo/3R20aXLuK3/7EhFJRHnEgvS1om xd/A91QZVvVQDXm7/gprbr0+9qUMQe8sJFuci9jbNEwQhLuiddMHE4qVdmAZ1vAamcGBVeKqi5tgD gki1nfs5xJcD/koU89jSbvUdGkFrmIxrsJXEXaDRH1biGRjHjpS7K5O+EFcGSrUhmKIEeUyc/QT6D dquRnnie5IwHPILQAJl/1F7a99i8ZHD7G5KjJDCTeXNEv8btq4iiIU1HNwwgvq2UHUascSdOEQBDv vIlNU+X//JtIu1iI9mHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5Umm-0000000Bt3b-0l5B; Mon, 28 Oct 2024 18:48:16 +0000 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5Ujq-0000000BsRl-1ezp for linux-arm-kernel@lists.infradead.org; Mon, 28 Oct 2024 18:45:16 +0000 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49SBF3WQ027649; Mon, 28 Oct 2024 18:45:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=FFpEevja3y6wKaFfcKqCGL 7fQ+TPELn6XQKMoqKg3lA=; b=X+wcFRTa4tKDvCkFYHarNO/3VoVRxILlDjfvl1 dvkoQGp0Kh3y93VIYcGSNWdte4wDHuzaQdlF0ovsKRaFBRZFQyv6YpYxjsbqA0Ty XALNCH2Xi3cv+lrMT3EcQxAJGumaUjHhS/DFKp7pgj+DHcC8+c6Elx7V17PyWd2V gW4WfQO5A3b1EsxOYfNdwMehCqZY82HFOLuQ/6Fnmy2JKVabuwtt4DyGXkPhe4vg vt9dWcSr3jtiuzR+cqtAasV+01iEE/fSn0xuPEO8i6DTzrDEwRkgl5LTZCWZMv6k bJNLjDeSCp3aIhEKb/95r1EjVw8G17W1+S5AbyfUEbpfXxKw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42gqcqp3qy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2024 18:45:01 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49SIj1wf012515 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2024 18:45:01 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 28 Oct 2024 11:45:00 -0700 From: Elliot Berman <quic_eberman@quicinc.com> Subject: [PATCH v7 0/5] Implement vendor resets for PSCI SYSTEM_RESET2 Date: Mon, 28 Oct 2024 11:44:54 -0700 Message-ID: <20241028-arm-psci-system_reset2-vendor-reboots-v7-0-a4c40b0ebc54@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAKfbH2cC/5XSy07DMBAF0F+pssZoxq84XfEfCCFnPKFeNCl2i Kiq/jtOeRRoF+lyvDh35sqHKnOKnKv16lAlnmKOQ1+G+m5V0cb3LyxiKHMlQSoEtMKnrdhliiL v88jb58SZRykm7sOQROJ2GMYsiJQP2liCGqpi7RJ38f2U8/hU5k3M45D2p9gJ59evBKkXJkwoQ IDFtq4JGtTw8PoWKfZ0T8N2jvz0FNziBQrBKmWkD3jVQ6xv2k+RtijRKJZ/vLmDSX7frUHj4rv lvKdvPBjjrXbdpavOrkGz1FXFRRuC7hoC3+pLV59di7jU1cVtXFe29bX27C5d89td3K+Z+3W2M dBZA3TFtT9u+bluqWuLW7yWnWvBy389HI/HDzELh7M0AwAA To: Bjorn Andersson <andersson@kernel.org>, Sebastian Reichel <sre@kernel.org>, Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>, Andy Yan <andy.yan@rock-chips.com>, Lorenzo Pieralisi <lpieralisi@kernel.org>, "Mark Rutland" <mark.rutland@arm.com>, Bartosz Golaszewski <bartosz.golaszewski@linaro.org>, Arnd Bergmann <arnd@arndb.de>, "Olof Johansson" <olof@lixom.net>, Catalin Marinas <catalin.marinas@arm.com>, "Will Deacon" <will@kernel.org>, <cros-qcom-dts-watchers@chromium.org>, "Krzysztof Kozlowski" <krzk+dt@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>, Konrad Dybcio <konradybcio@kernel.org> CC: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>, Melody Olvera <quic_molvera@quicinc.com>, Shivendra Pratap <quic_spratap@quicinc.com>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Florian Fainelli <florian.fainelli@broadcom.com>, Stephen Boyd <swboyd@chromium.org>, <linux-pm@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, Elliot Berman <quic_eberman@quicinc.com> X-Mailer: b4 0.14.1 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: szCmzW5AzBZvPNpUoWbl-H_bOCqMtg17 X-Proofpoint-GUID: szCmzW5AzBZvPNpUoWbl-H_bOCqMtg17 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 bulkscore=0 adultscore=0 spamscore=0 phishscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 mlxscore=0 mlxlogscore=809 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410280147 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241028_114514_495242_4F4B7473 X-CRM114-Status: GOOD ( 19.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
Series |
Implement vendor resets for PSCI SYSTEM_RESET2
|
expand
|
The PSCI SYSTEM_RESET2 call allows vendor firmware to define additional reset types which could be mapped to the reboot argument. Setting up reboot on Qualcomm devices can be inconsistent from chipset to chipset. Generally, there is a PMIC register that gets written to decide the reboot type. There is also sometimes a cookie that can be written to indicate that the bootloader should behave differently than a regular boot. These knobs evolve over product generations and require more drivers. Qualcomm firmwares are beginning to expose vendor SYSTEM_RESET2 types to simplify driver requirements from Linux. Add support in PSCI to statically wire reboot mode commands from userspace to a vendor reset and cookie value using the device tree. The DT bindings are similar to reboot mode framework except that 2 integers are accepted (the type and cookie). Also, reboot mode framework is intended to program the cookies, but not actually reboot the host. PSCI SYSTEM_RESET2 does both. I've not added support for reading ACPI tables since I don't have any device which provides them + firmware that supports vendor SYSTEM_RESET2 types. Lorenzo and I are also looking for some feedback on whether it is safe to perform a vendor SYSTEM_RESET2 irrespective of the enum reboot_mode: https://lore.kernel.org/all/Zw5ffeYW5uRpsaG3@lpieralisi/ Previous discussions around SYSTEM_RESET2: - https://lore.kernel.org/lkml/20230724223057.1208122-2-quic_eberman@quicinc.com/T/ - https://lore.kernel.org/all/4a679542-b48d-7e11-f33a-63535a5c68cb@quicinc.com/ Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> Changes in v7: - Code style nits from Stephen - Dropped unnecessary hunk from the sa8775p-ride patch - Link to v6: https://lore.kernel.org/r/20241018-arm-psci-system_reset2-vendor-reboots-v6-0-50cbe88b0a24@quicinc.com Changes in v6: - Rebase to v6.11 and fix trivial conflicts in qcm6490-idp - Add sa8775p-ride support (same as qcm6490-idp) - Link to v5: https://lore.kernel.org/r/20240617-arm-psci-system_reset2-vendor-reboots-v5-0-086950f650c8@quicinc.com Changes in v5: - Drop the nested "items" in prep for future dtschema tools - Link to v4: https://lore.kernel.org/r/20240611-arm-psci-system_reset2-vendor-reboots-v4-0-98f55aa74ae8@quicinc.com Changes in v4: - Change mode- properties from uint32-matrix to uint32-array - Restructure the reset-types node so only the restriction is in the if/then schemas and not the entire definition - Link to v3: https://lore.kernel.org/r/20240515-arm-psci-system_reset2-vendor-reboots-v3-0-16dd4f9c0ab4@quicinc.com Changes in v3: - Limit outer number of items to 1 for mode-* properties - Move the reboot-mode for psci under a subnode "reset-types" - Fix the DT node in qcm6490-idp so it doesn't overwrite the one from sc7820.dtsi - Link to v2: https://lore.kernel.org/r/20240414-arm-psci-system_reset2-vendor-reboots-v2-0-da9a055a648f@quicinc.com Changes in v2: - Fixes to schema as suggested by Rob and Krzysztof - Add qcm6490 idp as first Qualcomm device to support - Link to v1: https://lore.kernel.org/r/20231117-arm-psci-system_reset2-vendor-reboots-v1-0-03c4612153e2@quicinc.com Changes in v1: - Reference reboot-mode bindings as suggeted by Rob. - Link to RFC: https://lore.kernel.org/r/20231030-arm-psci-system_reset2-vendor-reboots-v1-0-dcdd63352ad1@quicinc.com --- Elliot Berman (5): dt-bindings: power: reset: Convert mode-.* properties to array dt-bindings: arm: Document reboot mode magic firmware: psci: Read and use vendor reset types arm64: dts: qcom: Add PSCI SYSTEM_RESET2 types for qcm6490-idp arm64: dts: qcom: Add PSCI SYSTEM_RESET2 types for sa8775p-ride Documentation/devicetree/bindings/arm/psci.yaml | 43 +++++++++ .../bindings/power/reset/nvmem-reboot-mode.yaml | 4 + .../devicetree/bindings/power/reset/qcom,pon.yaml | 7 ++ .../bindings/power/reset/reboot-mode.yaml | 4 +- .../bindings/power/reset/syscon-reboot-mode.yaml | 4 + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 ++ arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 7 ++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- drivers/firmware/psci/psci.c | 104 +++++++++++++++++++++ 10 files changed, 180 insertions(+), 4 deletions(-) --- base-commit: 98f7e32f20d28ec452afb208f9cffc08448a2652 change-id: 20231016-arm-psci-system_reset2-vendor-reboots-cc3ad456c070 Best regards,