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Thu, 12 Dec 2024 00:18:57 -0800 (PST) Date: Thu, 12 Dec 2024 09:18:42 +0100 Mime-Version: 1.0 X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=2901; i=ardb@kernel.org; h=from:subject; bh=eoER92ARiF/hRhV403UkEurD5/0joQIOstiB5pr57tY=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIT1qTtKkmgc2N9Idr01x/DpX6Nrn5+87Ns2feNV4bsvuK dX7Tu4711HKwiDGwSArpsgiMPvvu52nJ0rVOs+ShZnDygQyhIGLUwAmkhPL8N8xe0NlmojhwkKJ AHsjt5scUmE7Hty+pfNo+VduF1k3V35GhsdmCjFvvaRmtLBkyae1y/w0X8lppZoh8Cbt4XK+v2U VLAA= X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <20241212081841.2168124-8-ardb+git@google.com> Subject: [PATCH v3 0/6] arm64: Clean up and simplify PA space size handling From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , Catalin Marinas , Will Deacon , Marc Zyngier , Mark Rutland , Ryan Roberts , Anshuman Khandual , Kees Cook , Quentin Perret X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241212_001859_393432_8B1EDA52 X-CRM114-Status: GOOD ( 15.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ard Biesheuvel This series addresses a number of buglets related to how we handle the size of the physical address space when building LPA2 capable kernels: - reject 52-bit physical addressess in the mapping routines when LPA2 is configured but not available at runtime - ensure that TCR.IPS is not set to 52-bits if LPA2 is not supported - ensure that TCR_EL2.PS and DS match the host, regardless of whether LPA2 is available at stage 2 - don't rely on kvm_get_parange() and invalid physical addresses as control flags in the pKVM page donation APIs Finally, the configurable 48-bit physical address space limit is dropped entirely, as it doesn't buy us a lot now that all the PARange and {I}PS handling is done at runtime. Changes since v2: - add a definition of MAX_POSSIBLE_PHYSMEM_BITS to fix a build error in zsmalloc (#1) - rename 'owner_update' to 'annotation' (#4) Changes since v1: - rebase onto v6.13-rc1 - add Anshuman's ack to patch #1 - incorporate Anshuman's feedback on patches #1 and #2 - tweak owner_update logic in patch #4 Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Rutland Cc: Ryan Roberts Cc: Anshuman Khandual Cc: Kees Cook Cc: Quentin Perret Ard Biesheuvel (6): arm64/mm: Reduce PA space to 48 bits when LPA2 is not enabled arm64/mm: Override PARange for !LPA2 and use it consistently arm64/kvm: Configure HYP TCR.PS/DS based on host stage1 arm64/kvm: Avoid invalid physical addresses to signal owner updates arm64: Kconfig: force ARM64_PAN=y when enabling TTBR0 sw PAN arm64/mm: Drop configurable 48-bit physical address space limit arch/arm64/Kconfig | 37 ++------------------ arch/arm64/include/asm/assembler.h | 14 +++----- arch/arm64/include/asm/cpufeature.h | 3 +- arch/arm64/include/asm/kvm_pgtable.h | 3 +- arch/arm64/include/asm/pgtable-hwdef.h | 12 +------ arch/arm64/include/asm/pgtable-prot.h | 7 ++++ arch/arm64/include/asm/pgtable.h | 11 +----- arch/arm64/include/asm/sparsemem.h | 5 ++- arch/arm64/include/asm/sysreg.h | 6 ---- arch/arm64/kernel/cpufeature.c | 2 +- arch/arm64/kernel/pi/idreg-override.c | 9 +++++ arch/arm64/kernel/pi/map_kernel.c | 6 ++++ arch/arm64/kvm/arm.c | 8 ++--- arch/arm64/kvm/hyp/pgtable.c | 33 ++++++----------- arch/arm64/mm/init.c | 7 +++- arch/arm64/mm/pgd.c | 9 ++--- arch/arm64/mm/proc.S | 2 -- scripts/gdb/linux/constants.py.in | 1 - tools/arch/arm64/include/asm/sysreg.h | 6 ---- 19 files changed, 64 insertions(+), 117 deletions(-)