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[0/4] Improve Rockchip VOP2 display modes handling on RK3588 HDMI1

Message ID 20250215-vop2-hdmi1-disp-modes-v1-0-81962a7151d6@collabora.com (mailing list archive)
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Series Improve Rockchip VOP2 display modes handling on RK3588 HDMI1 | expand

Message

Cristian Ciocaltea Feb. 15, 2025, 12:55 a.m. UTC 
As a followup to getting basic HDMI1 output support [1] merged upstream,
make use of the HDMI1 PHY PLL to provide better VOP2 display modes
handling for the second HDMI output port on RK3588 SoC, similarly to
what has been achieved recently for HDMI0 [2].

Additionally, enable HDMI1 output on Rockchip RK3588 EVB1.

[1] https://lore.kernel.org/lkml/20241211-rk3588-hdmi1-v2-0-02cdca22ff68@collabora.com/
[2] https://lore.kernel.org/lkml/20250204-vop2-hdmi0-disp-modes-v3-0-d71c6a196e58@collabora.com/

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Cristian Ciocaltea (4):
      drm/rockchip: vop2: Improve display modes handling on RK3588 HDMI1
      arm64: dts: rockchip: Enable HDMI1 PHY clk provider on RK3588
      arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588
      arm64: dts: rockchip: Enable HDMI1 on rk3588-evb1

 arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 42 ++++++++++++++++++++++--
 arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi   | 22 +++++++++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c     | 26 ++++++++++++++-
 3 files changed, 87 insertions(+), 3 deletions(-)
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base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
change-id: 20250215-vop2-hdmi1-disp-modes-ea8da428bc8e