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[RESEND,v6,0/7] Add some enhancements for i.MX95 PCIe

Message ID 20250416081314.3929794-1-hongxing.zhu@nxp.com (mailing list archive)
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Series Add some enhancements for i.MX95 PCIe | expand

Message

Richard Zhu April 16, 2025, 8:13 a.m. UTC 
Add some enhancements for i.MX95 PCIe.
- Refine the link procedure to speed up link training.
- Add two ERRATA SW workarounds.
- To align PHY's power on sequency, add COLD reset.
- Add PLL clock lock check.
- Save/retore the LUT table in supend/resume callbacks.
- 3/7 relies on "arm64: dts: imx95: Correct the range of PCIe app-reg region"
  https://lore.kernel.org/imx/20250314060104.390065-1-hongxing.zhu@nxp.com/

v6 changes:
- Move the PLL clock lock check out of core_reset, and collect to a new
  callback function.
- Update the commit message of 4/7.
- Correct the typo errors in the commit messgage of 2/7 patch refer to
  Alok's comments. Thanks.
- Add the dependecy of 3/7 into the cover letter refer to Alexander'
  comments.

v5 changes:
- Rebase to v6.15-rc1
- Update the commit message of "PCI: imx6: Skip one dw_pcie_wait_for_link() in"

v4 changes:
- Add another patch to skip one dw_pcie_wait_for_link() in the workaround link
  training refer to Mani' suggestion.
- Rephrase the comments in "PCI: imx6: Toggle the cold reset for i.MX95 PCIe".
- Correct the error return in "PCI: imx6: Add PLL clock lock check for i.MX95 PCIe".
- Collect and add the Reviewd-by tags.

v3 changes:
- Correct the typo error in first patch, and update the commit message of
  #1 and #6 pathes.
- Use a quirk flag to specify the errata workaround contained in post_init.

v2 changes:
- Correct typo error, and update commit message.
- Replace regmap_update_bits() by regmap_set_bits/regmap_clear_bits.
- Use post_init callback of dw_pcie_host_ops.
- Add one more PLL lock check patch.
- Reformat LUT save and restore functions.

[PATCH RESEND v6 1/7] PCI: imx6: Start link directly when workaround
[PATCH RESEND v6 2/7] PCI: imx6: Skip one dw_pcie_wait_for_link() in
[PATCH RESEND v6 3/7] PCI: imx6: Toggle the cold reset for i.MX95
[PATCH RESEND v6 4/7] PCI: imx6: Workaround i.MX95 PCIe may not exit
[PATCH RESEND v6 5/7] PCI: imx6: Let i.MX95 PCIe compliance with
[PATCH RESEND v6 6/7] PCI: imx6: Add PLL clock lock check for i.MX95
[PATCH RESEND v6 7/7] PCI: imx6: Save and restore the LUT setting for

drivers/pci/controller/dwc/pci-imx6.c | 213 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------
1 file changed, 182 insertions(+), 31 deletions(-)