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Wed, 17 Jun 2020 09:48:14 -0700 (PDT) From: Cristian Ciocaltea To: Rob Herring , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , Philipp Zabel Subject: [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs Date: Wed, 17 Jun 2020 19:48:00 +0300 Message-Id: X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200617_094817_099061_02B0C336 X-CRM114-Status: GOOD ( 13.12 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:643 listed in] [list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [cristian.ciocaltea[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch series improves the existing implementation of the Clock Management Unit for the Actions Semi S500 SoC, by adding support for some missing clocks, like DMAC and GPIO. Additionally, it enables the UART nodes in the common owl-s500 DTS to use the clock provided by the CMU. That means the S500 based SBCs can now get rid of their (fake) UART fixed clock and, as a matter of fact, this has been already done here for RoseapplePi, the new board which is going to be supported (hopefully) via the following patchset: https://lore.kernel.org/lkml/cover.1592123160.git.cristian.ciocaltea@gmail.com/ Eventually, the patchset adds support for the Actions Semi S500 SoC's DMA controller and Reset Management Unit. Please note the already existing Actions Semi Owl SoCs DMA driver seems to be fully compatible with S500, even though this is not explicitly mentioned in the source code. For the moment, I have just enabled the DMA controller node in owl-s500 DTS using the "actions,s900-dma" compatible string. In the upcoming patch series I will provide a pinctrl driver and enable access to MMC and I2C. Thanks, Cristi Cristian Ciocaltea (11): clk: actions: Fix h_clk for Actions S500 SoC arm: dts: owl-s500: Add Clock Management Unit arm: dts: owl-s500: Set UART clock refs from CMU arm: dts: owl-s500-roseapplepi: Use UART clock from CMU dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC arm: dts: owl-s500: Add DMA controller dt-bindings: reset: Add binding constants for Actions S500 RMU clk: actions: Add Actions S500 SoC Reset Management Unit support arm: dts: owl-s500: Add Reset Controller support MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs MAINTAINERS | 1 + arch/arm/boot/dts/owl-s500-roseapplepi.dts | 7 -- arch/arm/boot/dts/owl-s500.dtsi | 37 ++++++++ drivers/clk/actions/owl-s500.c | 91 ++++++++++++++++++- include/dt-bindings/clock/actions,s500-cmu.h | 77 ++++++++-------- .../dt-bindings/reset/actions,s500-reset.h | 67 ++++++++++++++ 6 files changed, 235 insertions(+), 45 deletions(-) create mode 100644 include/dt-bindings/reset/actions,s500-reset.h