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[v7,0/2] net: macb: Wake-on-Lan magic packet GEM and MACB handling

Message ID cover.1595235208.git.nicolas.ferre@microchip.com (mailing list archive)
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Series net: macb: Wake-on-Lan magic packet GEM and MACB handling | expand

Message

Nicolas Ferre July 20, 2020, 8:56 a.m. UTC 
From: Nicolas Ferre <nicolas.ferre@microchip.com>

Hi,

Here is the second part of support for WoL magic-packet on the current macb
driver. This one
is addressing the bulk of the feature and is based on current net-next/master.

MACB and GEM code must co-exist and as they don't share exactly the same
register layout, I had to specialize a bit the suspend/resume paths and plug a
specific IRQ handler in order to avoid overloading the "normal" IRQ hot path.

These changes were tested on both sam9x60 which embeds a MACB+FIFO controller
and sama5d2 which has a GEM+packet buffer type of controller.

Best regards,
  Nicolas

Changes in v7:
- Release the spinlock before exiting macb_suspend/resume in case of error
  changing IRQ handler

Changes in v6:
- rebase on net-next/master now that the "fixes" patches of the series are
  merged in both net and net-next.
- GEM addition and MACB update to finish the support of WoL magic-packet on the
  two revisions of the controller.

These 2 patches were last posted in v3 series.

History of previous changes already added to git commit message here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f9f41e3db40ee8d61b427d4d88c7365d968052a9


Nicolas Ferre (2):
  net: macb: WoL support for GEM type of Ethernet controller
  net: macb: Add WoL interrupt support for MACB type of Ethernet
    controller

 drivers/net/ethernet/cadence/macb.h      |   3 +
 drivers/net/ethernet/cadence/macb_main.c | 191 +++++++++++++++++++----
 2 files changed, 167 insertions(+), 27 deletions(-)

Comments

David Miller July 21, 2020, 12:02 a.m. UTC | #1 
From: <nicolas.ferre@microchip.com>
Date: Mon, 20 Jul 2020 10:56:51 +0200

> Here is the second part of support for WoL magic-packet on the current macb
> driver. This one
> is addressing the bulk of the feature and is based on current net-next/master.
> 
> MACB and GEM code must co-exist and as they don't share exactly the same
> register layout, I had to specialize a bit the suspend/resume paths and plug a
> specific IRQ handler in order to avoid overloading the "normal" IRQ hot path.
> 
> These changes were tested on both sam9x60 which embeds a MACB+FIFO controller
> and sama5d2 which has a GEM+packet buffer type of controller.

Series applied to net-next, thanks.