Show patches with: Submitter = Atish Kumar Patra       |   86 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,21/21] Sync empty-pmu-events.c with autogenerated one Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,20/21] tools/perf: Pass the Counter constraint values in the pmu events Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,19/21] tools/perf: Support event code for arch standard events Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,18/21] RISC-V: perf: Add Qemu virt machine events Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,17/21] RISC-V: perf: Add legacy event encodings via sysfs Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,15/21] RISC-V: perf: Skip PMU SBI extension when not implemented Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,14/21] RISC-V: perf: Implement supervisor counter delegation support Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,12/21] RISC-V: perf: Modify the counter discovery mechanism Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,11/21] RISC-V: perf: Restructure the SBI PMU code Add Counter delegation ISA extension support - 1 - --- 2025-02-06 Atish Kumar Patra New
[v4,10/21] dt-bindings: riscv: add Counter delegation ISA extensions description Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,09/21] RISC-V: Add Ssccfg ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,08/21] RISC-V: Add Sscfg extension CSR definition Add Counter delegation ISA extension support - 1 - --- 2025-02-06 Atish Kumar Patra New
[v4,07/21] dt-bindings: riscv: add Smcntrpmf ISA extension description Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,06/21] RISC-V: Add Smcntrpmf extension parsing Add Counter delegation ISA extension support - 1 - --- 2025-02-06 Atish Kumar Patra New
[v4,05/21] RISC-V: Define indirect CSR access helpers Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,04/21] dt-bindings: riscv: add Sxcsrind ISA extension description Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v4,02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions Add Counter delegation ISA extension support - 1 - --- 2025-02-06 Atish Kumar Patra New
[v4,01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware… Add Counter delegation ISA extension support - - - --- 2025-02-06 Atish Kumar Patra New
[v3,21/21] Sync empty-pmu-events.c with autogenerated one Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,20/21] tools/perf: Pass the Counter constraint values in the pmu events Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,19/21] tools/perf: Support event code for arch standard events Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,18/21] RISC-V: perf: Add Qemu virt machine events Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,17/21] RISC-V: perf: Add legacy event encodings via sysfs Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,15/21] RISC-V: perf: Skip PMU SBI extension when not implemented Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,14/21] RISC-V: perf: Implement supervisor counter delegation support Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,12/21] RISC-V: perf: Modify the counter discovery mechanism Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,11/21] RISC-V: perf: Restructure the SBI PMU code Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,10/21] dt-bindings: riscv: add Smcntrpmf ISA extension description Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,09/21] RISC-V: Add Smcntrpmf extension parsing Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,08/21] dt-bindings: riscv: add Counter delegation ISA extensions description Add Counter delegation ISA extension support 1 - - --- 2025-01-28 Atish Kumar Patra New
[v3,07/21] RISC-V: Add Ssccfg ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,06/21] RISC-V: Add Sscfg extension CSR definition Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,05/21] RISC-V: Define indirect CSR access helpers Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,04/21] dt-bindings: riscv: add Sxcsrind ISA extension description Add Counter delegation ISA extension support 1 - - --- 2025-01-28 Atish Kumar Patra New
[v3,03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v3,01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware… Add Counter delegation ISA extension support - - - --- 2025-01-28 Atish Kumar Patra New
[v2,9/9] RISC-V: KVM: Upgrade the supported SBI version to 3.0 Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,8/9] RISC-V: KVM: Implement get event info function Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,7/9] RISC-V: KVM: Use the new gpa range validate helper function Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,6/9] KVM: Add a helper function to validate vcpu gpa range Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,5/9] drivers/perf: riscv: Export PMU event info function Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,4/9] drivers/perf: riscv: Implement PMU event info function Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,3/9] RISC-V: KVM: Add support for Raw event v2 Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,2/9] drivers/perf: riscv: Add raw event v2 support Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,1/9] drivers/perf: riscv: Add SBI v3.0 flag Add SBI v3.0 PMU enhancements - - - --- 2025-01-15 Atish Kumar Patra New
[v2,21/21] Sync empty-pmu-events.c with autogenerated one Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,20/21] tools/perf: Pass the Counter constraint values in the pmu events Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,19/21] tools/perf: Support event code for arch standard events Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,18/21] RISC-V: perf: Add Qemu virt machine events Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,17/21] RISC-V: perf: Add legacy event encodings via sysfs Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,15/21] RISC-V: perf: Skip PMU SBI extension when not implemented Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,14/21] RISC-V: perf: Implement supervisor counter delegation support Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,12/21] RISC-V: perf: Modify the counter discovery mechanism Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,11/21] RISC-V: perf: Restructure the SBI PMU code Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,10/21] dt-bindings: riscv: add Smcntrpmf ISA extension description Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,09/21] RISC-V: Add Smcntrpmf extension parsing Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,08/21] dt-bindings: riscv: add Ssccfg ISA extension description Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,07/21] RISC-V: Add Ssccfg ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,06/21] RISC-V: Add Sscfg extension CSR definition Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,05/21] RISC-V: Define indirect CSR access helpers Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,04/21] dt-bindings: riscv: add Sxcsrind ISA extension description Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[v2,01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware… Add Counter delegation ISA extension support - - - --- 2025-01-14 Atish Kumar Patra New
[8/8] RISC-V: KVM: Upgrade the supported SBI version to 3.0 Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[7/8] RISC-V: KVM: Implement get event info function Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[6/8] drivers/perf: riscv: Export PMU event info function Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[5/8] drivers/perf: riscv: Implement PMU event info function Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[4/8] RISC-V: KVM: Add support for Raw event v2 Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[3/8] drivers/perf: riscv: Add raw event v2 support Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[2/8] drivers/perf: riscv: Fix Platform firmware event data Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[1/8] drivers/perf: riscv: Add SBI v3.0 flag Add SBI v3.0 PMU enhancements - - - --- 2024-11-19 Atish Kumar Patra New
[v4,3/3] perf: RISC-V: Check standard event availability Assorted fixes in RISC-V PMU driver - 1 1 --- 2024-06-28 Atish Kumar Patra New
[v4,2/3] drivers/perf: riscv: Reset the counter to hpmevent mapping while starting cpus Assorted fixes in RISC-V PMU driver - - - --- 2024-06-28 Atish Kumar Patra New
[v4,1/3] drivers/perf: riscv: Do not update the event data if uptodate Assorted fixes in RISC-V PMU driver - - - --- 2024-06-28 Atish Kumar Patra New
[v3,3/3] perf: RISC-V: Check standard event availability Assorted fixes in RISC-V PMU driver - 1 1 --- 2024-06-26 Atish Kumar Patra New
[v3,2/3] drivers/perf: riscv: Reset the counter to hpmevent mapping while starting cpus Assorted fixes in RISC-V PMU driver - - - --- 2024-06-26 Atish Kumar Patra New
[v3,1/3] drivers/perf: riscv: Do not update the event data if uptodate Assorted fixes in RISC-V PMU driver - - - --- 2024-06-26 Atish Kumar Patra New