Show patches with: Submitter = Yu-Chien Peter Lin       |    State = Action Required       |   20 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,RESEND,13/13] riscv: andes: Support symbolic FW and HW raw events Support Andes PMU extension - 3 - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,12/13] riscv: dts: renesas: Add Andes PMU extension Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v3,RESEND,11/13] riscv: dts: allwinner: Add T-Head PMU extension Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,10/13] dt-bindings: riscv: Add Andes PMU extension description Support Andes PMU extension 1 - - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v3,RESEND,09/13] dt-bindings: riscv: Add T-Head PMU extension description Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,08/13] perf: RISC-V: Introduce Andes PMU for perf event sampling Support Andes PMU extension - 2 - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v3,RESEND,07/13] RISC-V: Move T-Head PMU to CPU feature alternative framework Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,06/13] perf: RISC-V: Eliminate redundant IRQ enable/disable operations Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,04/13] dt-bindings: riscv: Add Andes interrupt controller compatible string Support Andes PMU extension - - - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v3,RESEND,03/13] irqchip/riscv-intc: Introduce Andes IRQ chip Support Andes PMU extension - 2 - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v3,RESEND,02/13] irqchip/riscv-intc: Allow large non-standard hwirq number Support Andes PMU extension - 2 - --- 2023-10-23 Yu-Chien Peter Lin New
[v3,RESEND,01/13] riscv: errata: Rename defines for Andes Support Andes PMU extension 1 2 - --- 2023-10-23 Yu-Chien Peter Lin New
[RFC,v2,08/10] perf: RISC-V: Introduce Andes PMU for perf event sampling Untitled series #794756 - 2 - --- 2023-10-19 Yu-Chien Peter Lin New
[RFC,v2,07/10] perf: RISC-V: Move T-Head PMU to CPU feature alternative framework Untitled series #794756 - - - --- 2023-10-19 Yu-Chien Peter Lin New
[v2,06/10] perf: RISC-V: Eliminate redundant IRQ enable/disable operations Untitled series #794756 - - - --- 2023-10-19 Yu-Chien Peter Lin New
[4/4] riscv: andes: Support symbolic FW and HW raw events Support Andes PMU extension - 2 - --- 2023-09-07 Yu-Chien Peter Lin New
[3/4] riscv: errata: Add Andes PMU errata Support Andes PMU extension - 2 - --- 2023-09-07 Yu-Chien Peter Lin New
[RFC,2/4] irqchip/riscv-intc: Support large non-standard hwirq number Support Andes PMU extension - 2 - --- 2023-09-07 Yu-Chien Peter Lin New
[1/4] riscv: errata: Rename defines for Andes Support Andes PMU extension - 2 - --- 2023-09-07 Yu-Chien Peter Lin New