From patchwork Thu May 23 09:56:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10957201 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 263DB76 for ; Thu, 23 May 2019 09:58:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0873A2842D for ; Thu, 23 May 2019 09:58:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E7F0228448; Thu, 23 May 2019 09:58:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 074832842D for ; Thu, 23 May 2019 09:58:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jy0QXTlaNWDW0wuOQpgYGUh6Ygm4VwYecKuEYuZfBOg=; b=RQiObYNgZQTzUz VUtdLz3i/M+BL7KjEv/kgENy+gsqn2P6aDJOEn7VyaoCuuudx5/mnB1ZmQWYbJJKWyiy5F7DvVJI4 bpnuolGouC3aBI0i6pXfPr7IdbkwzZq5HThmJDv8IkFSMNJKFojFn/6wzXIdHoKCVB2AdiLkYyea9 SwErLMC3vB1PMIN+Fb9QFGCLZLUZj+B0f0EozUfn2fCvFCLmANRmLnA7CVNWPVg8WJJbKzuclEuI2 pjWw1mTkvpwWJrlxaIp4PcSUJiElOJwUgo6PSGnlMumdUt9gGfpPVmCEELu84IJSb7PfynkJA2SvR eBKGUWn5Ge/Z90URAy1w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hTkUP-0008Tr-8c; Thu, 23 May 2019 09:58:21 +0000 Received: from relay11.mail.gandi.net ([217.70.178.231]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hTkTq-0007qT-8I for linux-arm-kernel@lists.infradead.org; Thu, 23 May 2019 09:57:57 +0000 Received: from localhost (aaubervilliers-681-1-80-185.w90-88.abo.wanadoo.fr [90.88.22.185]) (Authenticated sender: maxime.ripard@bootlin.com) by relay11.mail.gandi.net (Postfix) with ESMTPSA id 2374E100013; Thu, 23 May 2019 09:57:42 +0000 (UTC) From: Maxime Ripard To: Mark Rutland , Rob Herring , Frank Rowand , "David S . Miller" , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 8/8] dt-bindings: net: sun8i-emac: Convert the binding to a schemas Date: Thu, 23 May 2019 11:56:51 +0200 Message-Id: <037bc1e9d87b493db377209ad974e3e313ffed28.1558605170.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <74d98cc3c744d53710c841381efd41cf5f15e656.1558605170.git-series.maxime.ripard@bootlin.com> References: <74d98cc3c744d53710c841381efd41cf5f15e656.1558605170.git-series.maxime.ripard@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190523_025747_232935_3DC3157A X-CRM114-Status: GOOD ( 16.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Torgue , =?utf-8?q?Antoine_T=C3=A9nart?= , netdev@vger.kernel.org, Maxime Chevallier , Maxime Coquelin , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable the DT validation. Since that controller is based on a Synopsys IP, let's add the validation to that schemas with a bunch of conditionals. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 201 +------ Documentation/devicetree/bindings/net/snps,dwmac.yaml | 342 +++++++++++- 2 files changed, 342 insertions(+), 201 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt deleted file mode 100644 index 54c66d0611cb..000000000000 --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +++ /dev/null @@ -1,201 +0,0 @@ -* Allwinner sun8i GMAC ethernet controller - -This device is a platform glue layer for stmmac. -Please see stmmac.txt for the other unchanged properties. - -Required properties: -- compatible: must be one of the following string: - "allwinner,sun8i-a83t-emac" - "allwinner,sun8i-h3-emac" - "allwinner,sun8i-r40-gmac" - "allwinner,sun8i-v3s-emac" - "allwinner,sun50i-a64-emac" - "allwinner,sun50i-h6-emac", "allwinner-sun50i-a64-emac" -- reg: address and length of the register for the device. -- interrupts: interrupt for the device -- interrupt-names: must be "macirq" -- clocks: A phandle to the reference clock for this device -- clock-names: must be "stmmaceth" -- resets: A phandle to the reset control for this device -- reset-names: must be "stmmaceth" -- phy-mode: See ethernet.txt -- phy-handle: See ethernet.txt -- syscon: A phandle to the device containing the EMAC or GMAC clock register - -Optional properties: -- allwinner,tx-delay-ps: TX clock delay chain value in ps. - Range is 0-700. Default is 0. - Unavailable for allwinner,sun8i-r40-gmac -- allwinner,rx-delay-ps: RX clock delay chain value in ps. - Range is 0-3100. Default is 0. - Range is 0-700 for allwinner,sun8i-r40-gmac -Both delay properties need to be a multiple of 100. They control the -clock delay for external RGMII PHY. They do not apply to the internal -PHY or external non-RGMII PHYs. - -Optional properties for the following compatibles: - - "allwinner,sun8i-h3-emac", - - "allwinner,sun8i-v3s-emac": -- allwinner,leds-active-low: EPHY LEDs are active low - -Required child node of emac: -- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio" - -Required properties of the mdio node: -- #address-cells: shall be 1 -- #size-cells: shall be 0 - -The device node referenced by "phy" or "phy-handle" must be a child node -of the mdio node. See phy.txt for the generic PHY bindings. - -The following compatibles require that the emac node have a mdio-mux child -node called "mdio-mux": - - "allwinner,sun8i-h3-emac" - - "allwinner,sun8i-v3s-emac": -Required properties for the mdio-mux node: - - compatible = "allwinner,sun8i-h3-mdio-mux" - - mdio-parent-bus: a phandle to EMAC mdio - - one child mdio for the integrated mdio with the compatible - "allwinner,sun8i-h3-mdio-internal" - - one child mdio for the external mdio if present (V3s have none) -Required properties for the mdio-mux children node: - - reg: 1 for internal MDIO bus, 2 for external MDIO bus - -The following compatibles require a PHY node representing the integrated -PHY, under the integrated MDIO bus node if an mdio-mux node is used: - - "allwinner,sun8i-h3-emac", - - "allwinner,sun8i-v3s-emac": - -Additional information regarding generic multiplexer properties can be found -at Documentation/devicetree/bindings/net/mdio-mux.txt - -Required properties of the integrated phy node: -- clocks: a phandle to the reference clock for the EPHY -- resets: a phandle to the reset control for the EPHY -- Must be a child of the integrated mdio - -Example with integrated PHY: -emac: ethernet@1c0b000 { - compatible = "allwinner,sun8i-h3-emac"; - syscon = <&syscon>; - reg = <0x01c0b000 0x104>; - interrupts = ; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; - - phy-handle = <&int_mii_phy>; - phy-mode = "mii"; - allwinner,leds-active-low; - - mdio: mdio { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - }; - - mdio-mux { - compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"; - #address-cells = <1>; - #size-cells = <0>; - - mdio-parent-bus = <&mdio>; - - int_mdio: mdio@1 { - compatible = "allwinner,sun8i-h3-mdio-internal"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - int_mii_phy: ethernet-phy@1 { - reg = <1>; - clocks = <&ccu CLK_BUS_EPHY>; - resets = <&ccu RST_BUS_EPHY>; - phy-is-integrated; - }; - }; - ext_mdio: mdio@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; -}; - -Example with external PHY: -emac: ethernet@1c0b000 { - compatible = "allwinner,sun8i-h3-emac"; - syscon = <&syscon>; - reg = <0x01c0b000 0x104>; - interrupts = ; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; - - phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; - allwinner,leds-active-low; - - mdio: mdio { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - }; - - mdio-mux { - compatible = "allwinner,sun8i-h3-mdio-mux"; - #address-cells = <1>; - #size-cells = <0>; - - mdio-parent-bus = <&mdio>; - - int_mdio: mdio@1 { - compatible = "allwinner,sun8i-h3-mdio-internal"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - int_mii_phy: ethernet-phy@1 { - reg = <1>; - clocks = <&ccu CLK_BUS_EPHY>; - resets = <&ccu RST_BUS_EPHY>; - }; - }; - ext_mdio: mdio@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - ext_rgmii_phy: ethernet-phy@1 { - reg = <1>; - }; - }: - }; -}; - -Example with SoC without integrated PHY - -emac: ethernet@1c0b000 { - compatible = "allwinner,sun8i-a83t-emac"; - syscon = <&syscon>; - reg = <0x01c0b000 0x104>; - interrupts = ; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; - - phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - ext_rgmii_phy: ethernet-phy@1 { - reg = <1>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index d213c32ef153..e56260c84c16 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -15,6 +15,14 @@ properties: compatible: oneOf: - const: allwinner,sun7i-a20-gmac + - const: allwinner,sun8i-a83t-emac + - const: allwinner,sun8i-h3-emac + - const: allwinner,sun8i-r40-emac + - const: allwinner,sun8i-v3s-emac + - const: allwinner,sun50i-a64-emac + - items: + - const: allwinner,sun50i-h6-emac + - const: allwinner,sun50i-a64-emac - const: snps,dwmac - const: snps,dwmac-3.50a - const: snps,dwmac-3.610 @@ -306,6 +314,211 @@ allOf: - clocks - clock-names + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-r40-emac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + + then: + properties: + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + clocks: + maxItems: 1 + + clock-names: + const: stmmaceth + + syscon: + $ref: /schemas/types.yaml#definitions/phandle + description: + Phandle to the device containing the EMAC or GMAC clock + register + + required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - phy-mode + - phy-handle + - syscon + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-a83t-emac + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + - allwinner,sun50i-a64-emac + + then: + properties: + allwinner,tx-delay-ps: + allOf: + - $ref: /schemas/types.yaml#definitions/uint32 + - enum: [0, 100, 200, 300, 400, 500, 600, 700] + default: 0 + description: + External RGMII PHY TX clock delay chain value in ps. + + allwinner,rx-delay-ps: + allOf: + - $ref: /schemas/types.yaml#definitions/uint32 + - enum: + - 0 + - 100 + - 200 + - 300 + - 400 + - 500 + - 600 + - 700 + - 800 + - 900 + - 1000 + - 1100 + - 1200 + - 1300 + - 1400 + - 1500 + - 1600 + - 1700 + - 1800 + - 1900 + - 2000 + - 2100 + - 2200 + - 2300 + - 2400 + - 2500 + - 2600 + - 2700 + - 2800 + - 2900 + - 3000 + - 3100 + default: 0 + description: + External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-r40-emac + + then: + properties: + allwinner,rx-delay-ps: + allOf: + - $ref: /schemas/types.yaml#definitions/uint32 + - enum: [0, 100, 200, 300, 400, 500, 600, 700] + default: 0 + description: + External RGMII PHY TX clock delay chain value in ps. + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-h3-emac + - allwinner,sun8i-v3s-emac + + then: + properties: + allwinner,leds-active-low: + $ref: /schemas/types.yaml#definitions/flag + description: + EPHY LEDs are active low. + + mdio-mux: + type: object + + properties: + compatible: + const: allwinner,sun8i-h3-mdio-mux + + mdio-parent-bus: + $ref: /schemas/types.yaml#definitions/phandle + description: + Phandle to EMAC MDIO. + + mdio@1: + type: object + description: Internal MDIO Bus + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + compatible: + const: allwinner,sun8i-h3-mdio-internal + + reg: + const: 1 + + patternProperties: + "^ethernet-phy@[0-9a-f]$": + type: object + description: + Integrated PHY node + + properties: + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + required: + - clocks + - resets + + + mdio@2: + type: object + description: External MDIO Bus (H3 only) + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + compatible: + const: prout + + reg: + const: 2 + + required: + - compatible + - mdio-parent-bus + - mdio@1 + examples: - | stmmac_axi_setup: stmmac-axi-config { @@ -382,6 +595,135 @@ examples: phy-mode = "mii"; }; + - | + ethernet@1c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; + reg = <0x01c0b000 0x104>; + interrupts = <0 82 1>; + interrupt-names = "macirq"; + resets = <&ccu 12>; + reset-names = "stmmaceth"; + clocks = <&ccu 27>; + clock-names = "stmmaceth"; + + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + + mdio1: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + + mdio-mux { + compatible = "allwinner,sun8i-h3-mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + + mdio-parent-bus = <&mdio1>; + + int_mii_phy: mdio@1 { + compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@1 { + reg = <1>; + clocks = <&ccu 67>; + resets = <&ccu 39>; + phy-is-integrated; + }; + }; + + mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + - | + ethernet@1c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; + reg = <0x01c0b000 0x104>; + interrupts = <0 82 1>; + interrupt-names = "macirq"; + resets = <&ccu 12>; + reset-names = "stmmaceth"; + clocks = <&ccu 27>; + clock-names = "stmmaceth"; + + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; + allwinner,leds-active-low; + + mdio2: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + + mdio-mux { + compatible = "allwinner,sun8i-h3-mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + mdio-parent-bus = <&mdio2>; + + mdio@1 { + compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@1 { + reg = <1>; + clocks = <&ccu 67>; + resets = <&ccu 39>; + }; + }; + + mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + ext_rgmii_phy: ethernet-phy@1 { + reg = <1>; + }; + }; + }; + }; + + - | + ethernet@1c0b000 { + compatible = "allwinner,sun8i-a83t-emac"; + syscon = <&syscon>; + reg = <0x01c0b000 0x104>; + interrupts = <0 82 1>; + interrupt-names = "macirq"; + resets = <&ccu 13>; + reset-names = "stmmaceth"; + clocks = <&ccu 27>; + clock-names = "stmmaceth"; + phy-handle = <&ext_rgmii_phy1>; + phy-mode = "rgmii"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ext_rgmii_phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; + # FIXME: We should set it, but it would report all the generic # properties as additional properties. # additionalProperties: false