From patchwork Wed Feb 6 19:41:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10799983 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E2741390 for ; Wed, 6 Feb 2019 19:43:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DFD42C2A6 for ; Wed, 6 Feb 2019 19:43:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71EA52C423; Wed, 6 Feb 2019 19:43:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2129D2C2A6 for ; Wed, 6 Feb 2019 19:43:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MsuhlFcSeMFoYWiwrFFJChHrkxnpAqxkvN+lomTKT2I=; b=JPiV7ChbuikfhQ 3g7Q1QjlxoGx78LWG77Op8P/4cqpdk453J9oh75l+38W4a071JYGxJrP6VkggfKLEYil7JjaZ691z t8npjDNZDYT/ICcZGHe+ir85tqjOGmTUymmbTmJ/AwWVBmfpzTrDXXM5FhYzCEMMwtdHvQHxnO4Qf UAeuEAws/kyMNTBzN+6ml9Rimrfk83XToY2v8n0weyKIL2EevsnjDRivYopvF+rUuBMKTxQ+K0K+/ pN0h5UA2YfG4sULqDUuqlSbbNGPJ3dmo9IpqwNXH1Y0Xrbc43fIhDfuD/Cg4G/BOIMUnyu2hHFqWv SdKTUE6pgA4LOukgouKw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1grT69-0004UW-P8; Wed, 06 Feb 2019 19:43:05 +0000 Received: from relay2-d.mail.gandi.net ([217.70.183.194]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1grT5F-0003Wx-Rc for linux-arm-kernel@lists.infradead.org; Wed, 06 Feb 2019 19:42:15 +0000 X-Originating-IP: 90.89.68.76 Received: from localhost (lfbn-1-10718-76.w90-89.abo.wanadoo.fr [90.89.68.76]) (Authenticated sender: maxime.ripard@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 08AF240006; Wed, 6 Feb 2019 19:42:05 +0000 (UTC) From: Maxime Ripard To: Mark Rutland , Rob Herring , Frank Rowand , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v2 7/7] ARM: dts: sun5i: Add the MBUS controller Date: Wed, 6 Feb 2019 20:41:24 +0100 Message-Id: <03d3f58a2747b06da5d497a77be9b425a7b37528.1549482066.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190206_114210_510972_EE2DC0AA X-CRM114-Status: GOOD ( 11.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Thomas Petazzoni , Arnd Bergmann , dri-devel@lists.freedesktop.org, Georgi Djakov , Paul Kocialkowski , Yong Deng , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The MBUS (and its associated controller) is the bus in the Allwinner SoCs that DMA devices use in the system to access the memory. Among other things (and depending on the SoC generation), it can also enforce priorities or report bandwidth usages on a per-master basis. One of the most notable thing is that instead of having the same mapping for the RAM than the CPU, it maps it at address 0, which means we'll have to do address translation thanks to the dma-ranges property. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 5497d985c54a..a29203b7661d 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -127,6 +127,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + dma-ranges; ranges; system-control@1c00000 { @@ -181,6 +182,14 @@ }; }; + mbus: dram-controller@1c01000 { + compatible = "allwinner,sun5i-a13-mbus"; + reg = <0x01c01000 0x1000>; + clocks = <&ccu CLK_MBUS>; + dma-ranges = <0x00000000 0x40000000 0x20000000>; + #interconnect-cells = <1>; + }; + dma: dma-controller@1c02000 { compatible = "allwinner,sun4i-a10-dma"; reg = <0x01c02000 0x1000>; @@ -727,6 +736,8 @@ clock-names = "ahb", "mod", "ram"; resets = <&ccu RST_DE_FE>; + interconnects = <&mbus 19>; + interconnect-names = "dma"; status = "disabled"; ports { @@ -755,6 +766,8 @@ clock-names = "ahb", "mod", "ram"; resets = <&ccu RST_DE_BE>; + interconnects = <&mbus 18>; + interconnect-names = "dma"; status = "disabled"; assigned-clocks = <&ccu CLK_DE_BE>;