Message ID | 0722104f0a281ef8b628de384b6e6e52b75ae6b9.1592407030.git.cristian.ciocaltea@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 17 Jun 2020 09:48:27 -0700 (PDT) From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: Rob Herring <robh+dt@kernel.org>, =?utf-8?q?Andreas_F=C3=A4rber?= <afaerber@suse.de>, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Subject: [PATCH 10/11] arm: dts: owl-s500: Add Reset Controller support Date: Wed, 17 Jun 2020 19:48:10 +0300 Message-Id: <0722104f0a281ef8b628de384b6e6e52b75ae6b9.1592407030.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <cover.1592407030.git.cristian.ciocaltea@gmail.com> References: <cover.1592407030.git.cristian.ciocaltea@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200617_094830_612658_3E458F61 X-CRM114-Status: UNSURE ( 9.40 ) X-CRM114-Notice: Please train this message. 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Series |
Add CMU/RMU/DMA support for Actions Semi S500 SoCs
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expand
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diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi index 0f4fc5487dad..0b7ba2926f0e 100644 --- a/arch/arm/boot/dts/owl-s500.dtsi +++ b/arch/arm/boot/dts/owl-s500.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/actions,s500-cmu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/owl-s500-powergate.h> +#include <dt-bindings/reset/actions,s500-reset.h> / { compatible = "actions,s500"; @@ -188,6 +189,7 @@ cmu: clock-controller@b0160000 { reg = <0xb0160000 0x8000>; clocks = <&hosc>, <&losc>; #clock-cells = <1>; + #reset-cells = <1>; }; timer: timer@b0168000 {
Add reset controller property and bindings header for the Actions Semi S500 SoC DTS. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> --- arch/arm/boot/dts/owl-s500.dtsi | 2 ++ 1 file changed, 2 insertions(+)