From patchwork Fri May 25 05:40:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 10426377 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5807C6025B for ; Fri, 25 May 2018 05:49:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45612294DB for ; Fri, 25 May 2018 05:49:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 36DE8294E7; Fri, 25 May 2018 05:49:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C86CE294DB for ; Fri, 25 May 2018 05:49:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=u20ifGWyu/cmrHF6N2OEjXXzZUL6tHCsZHbrsWtsU2Y=; b=T0dP4UNfQ29SQDoT4v6SZdGwFd rpwyf6Iu9rdAW47ckENctiWNuYySpqUAdnmPDRKQGJ08sFtNE1Qr9vWEBQDt/XfYs9H//YKQJkRk7 A1iXo2vT+dcW7AHvbkrscyNxnPG0D8old3kjBFx+HsLQ1M7/ahYtzlNVmfQkDdAlG8IjcvaSHLamv yifTcn1zCOMZZUjNMYCNqtFWT6ieL8vnJCGYgR/IMV9W7QPWDPQlMUc2vLw7Ax/nvvcgZ8ZWNXcRj bY3/krEofgsfGaSSkpswTiDaXdfyRg2xJbyRzv1NJZhjqstNyaILfSRqLZ6RORCZ0ZUUNo/HcnCTF fnhY/D6w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fM5b2-0003Ay-BF; Fri, 25 May 2018 05:49:00 +0000 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fM5Sy-0007CN-No for linux-arm-kernel@lists.infradead.org; Fri, 25 May 2018 05:40:56 +0000 Received: by mail-pf0-x244.google.com with SMTP id q22-v6so2018049pff.11 for ; Thu, 24 May 2018 22:40:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=oRUuLH7flE4Fvg206nWF7csPgcPeAXkHjdKNYq5dMh8=; b=JdGna9NrumQ0C3jprwSOW4n+BGRLVsJM2q8xYQ+ii88CadkPC2krp2SGJz+AryW7VN dzARt55d59RtyjEmZ4AToTi3SEBg3ONe32+cZTW97hVDC3UpfLw7dr1hAUUV1VjNtjX5 nkwqCDGE0+6OVUQ7yCmzPRK7lyThPvfEBX5ZY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oRUuLH7flE4Fvg206nWF7csPgcPeAXkHjdKNYq5dMh8=; b=h/yvXBz/acLM1emWjvK6mNqCPheh/xQTq53uFZGsNTs3wz1zecnWc4a+DnFwkiMV4O 9Ie1/okArOTWOLkpkePkGezvk0rRB8Z50UwzSJErA6l4Cs6dQ4Xx95+jb/CU7Zf688Tw C3p1mhCb1a98t42hVKNowKiM5idmOpj1E9si3/16BuhVOeLGgeIGHTi0+77L7LhJUM27 q2UjHLFpNMDli/D57GeU92fNrjO5N4RhNTSrk4oX7yD1MgnYk4O6y1W3QVbhRCyT/wtP WinEfwDX3vd2AxjT0JNhe0K3GtOZ+TTEDGi2jAk3DP6Q+NrW0pckxYNFxhlAys4sTJrX 4xog== X-Gm-Message-State: ALKqPweZvphgI/OyNjfgfq3eSWBlQwq2/mrZHgVJBi8wTvuZN5nQAQNc V8sQEkfqY7LMcFzkCofClO0fCA== X-Google-Smtp-Source: AB8JxZowNq3p9ne9ohdsFwaUUuz1AyYWQyCLD5huuNJj6RR+m1pOGSspS2BBembp56G207DyPBd+Kg== X-Received: by 2002:a63:69c3:: with SMTP id e186-v6mr832546pgc.353.1527226838329; Thu, 24 May 2018 22:40:38 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id c83-v6sm45342586pfc.111.2018.05.24.22.40.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 May 2018 22:40:37 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Wei Xu , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon Subject: [PATCH 3/6] arm64: dts: hisilicon: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 11:10:03 +0530 Message-Id: <0754957a2c3842cf4e36fa27231d327fd8d6d499.1527225682.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180524_224040_821460_A4ACAE64 X-CRM114-Status: GOOD ( 13.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Vincent Guittot , Viresh Kumar , Daniel Lezcano , linux-kernel@vger.kernel.org, chris.redpath@arm.com, ionela.voinescu@arm.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 586b281cd531..247024df714f 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -88,8 +88,8 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; }; @@ -101,6 +101,8 @@ next-level-cache = <&CLUSTER0_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu2: cpu@2 { @@ -111,6 +113,8 @@ next-level-cache = <&CLUSTER0_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu3: cpu@3 { @@ -121,6 +125,8 @@ next-level-cache = <&CLUSTER0_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu4: cpu@100 { @@ -131,6 +137,8 @@ next-level-cache = <&CLUSTER1_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu5: cpu@101 { @@ -141,6 +149,8 @@ next-level-cache = <&CLUSTER1_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu6: cpu@102 { @@ -151,6 +161,8 @@ next-level-cache = <&CLUSTER1_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; cpu7: cpu@103 { @@ -161,6 +173,8 @@ next-level-cache = <&CLUSTER1_L2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; + #cooling-cells = <2>; /* min followed by max */ + dynamic-power-coefficient = <311>; }; CLUSTER0_L2: l2-cache0 {