From patchwork Mon Jul 3 19:10:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Anand X-Patchwork-Id: 9823839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 424FA60353 for ; Mon, 3 Jul 2017 19:17:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2EF7425F3E for ; Mon, 3 Jul 2017 19:17:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 220CD265B9; Mon, 3 Jul 2017 19:17:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9389725F3E for ; Mon, 3 Jul 2017 19:17:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=zHwaNG+CjQ4A2QzCC6+byyY8a15DSSAvLyi9gCLFQ8I=; b=H1G0zSJuC3P7QfRcGQrb73aulX O5DtpjS8zqsZPY+3U/N1JFDNhkBQhlLzECW5rwVLRdXeFpca4xOmdZcStksLysMmhin8Lea0b6NvR PmOUu5HSRUPyCbSKACy7rfSTHnQebONZhOW7oPD+N2YpFhkaymmCLR8XB0y3+VCYfYUM5qvnIDzC8 LE55lQicTQMa4CUQ/o7qEJpHh7KIKOQ0MVS7vgYfnojf4MW7oLQ8voaEX4n/T6Ave6YtAn9DhLKTd oeEEcXY2c04/cyltvGc1x1wBQOZSJR1EE0uXQBTt8HQdpNVLLmfxONsiETbcXd53lC3tZiqoCFAqc dvLHUjhQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dS6r3-0000oK-Bt; Mon, 03 Jul 2017 19:17:53 +0000 Received: from mail-pf0-f177.google.com ([209.85.192.177]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dS6qz-0000mQ-Hg for linux-arm-kernel@lists.infradead.org; Mon, 03 Jul 2017 19:17:52 +0000 Received: by mail-pf0-f177.google.com with SMTP id q86so104105569pfl.3 for ; Mon, 03 Jul 2017 12:17:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=DD+wCPTCWlCtEzIG1/d0sDKHBGNUZf+cBAa1xTW38Co=; b=Wbn0rLffcCYnp3MDeRBQ8IJZWzJxwl6LSF8ilQvW2pR7K+tNWFZXOO4p9oszHBjIsD iOBHg2LFQU7z9euQ6kOoa0VR0AFQOaou7HRICq5qVLFv6hBfMwZRRXht8yPX6xnYaCYb z1OkjZ/zJXFrCnWO1CPP4GfsHz9tWzdbENDqGD15CaSYWloWH0cq4PYSyqz32tYu2cQ7 Mn3gL2FbYiuhtgoikn/qS9nFfF7ECSyUIes21yVu5GNEgphmsJmaOmQnSn/YLaWUdylp MxQqB8zrevtf8bPuA/OncC6IalWk5XSyHJhCsg9jJwl1BYo+yh2x9VhaOsjhWACpiyW3 A29w== X-Gm-Message-State: AIVw111H9b5PWqAHOxcRDR5lFeNuuODMZ/OFo4+SiwUwpnnfkM7WkC48 kqBp9rrWIw9fwzPZQ1PRNQ== X-Received: by 10.98.202.210 with SMTP id y79mr11637288pfk.230.1499109048130; Mon, 03 Jul 2017 12:10:48 -0700 (PDT) Received: from localhost ([122.162.147.68]) by smtp.gmail.com with ESMTPSA id n13sm16496760pgs.0.2017.07.03.12.10.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Jul 2017 12:10:47 -0700 (PDT) From: Pratyush Anand To: linux-arm-kernel@lists.infradead.org, will.deacon@arm.com, mark.rutland@arm.com Subject: [PATCH 2/2] arm64: disable irq between breakpoint and step exception Date: Tue, 4 Jul 2017 00:40:27 +0530 Message-Id: <082c1ea9eebfd3e08bae5f26c2ba70f15c361664.1499107909.git.panand@redhat.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170703_121749_649956_55CC7A30 X-CRM114-Status: GOOD ( 18.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pratyush Anand , huawei.libin@huawei.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP If an interrupt is generated between breakpoint and step handler then step handler can not get correct step address. This situation can easily be invoked by samples/hw_breakpoint/data_breakpoint.c. It can also be reproduced if we insert any printk() statement or dump_stack() in perf overflow_handler. So, it seems that perf is working fine just luckily. If the CPU which is handling perf breakpoint handler receives any interrupt then, perf step handler will not execute sanely. This patch improves do_debug_exception() handling, which enforces now, that exception handler function: - should return 0 for any software breakpoint and hw breakpoint/watchpoint handler if it does not expect a single step stage - should return 1 if it expects single step. - A single step handler should always return 0. - All handler should return a -ve error in any other case. Now, we can know in do_debug_exception() that whether a step exception will be followed or not. If there will a step exception then disable irq. Re-enable it after single step handling. Signed-off-by: Pratyush Anand --- arch/arm64/kernel/debug-monitors.c | 3 +++ arch/arm64/kernel/hw_breakpoint.c | 4 ++-- arch/arm64/mm/fault.c | 22 ++++++++++++++++++---- 3 files changed, 23 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c index d618e25c3de1..16f29f853b54 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -325,6 +325,9 @@ static int brk_handler(unsigned long addr, unsigned int esr, return -EFAULT; } + if (kernel_active_single_step() || test_thread_flag(TIF_SINGLESTEP)) + return 1; + return 0; } NOKPROBE_SYMBOL(brk_handler); diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 46dbbf94f72d..cb0d6cbdb767 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -698,7 +698,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr, } } - return 0; + return 1; } NOKPROBE_SYMBOL(breakpoint_handler); @@ -843,7 +843,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, } } - return 0; + return 1; } NOKPROBE_SYMBOL(watchpoint_handler); diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 37b95dff0b07..ce5290dacba3 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -653,6 +653,13 @@ static struct fault_info __refdata debug_fault_info[] = { { do_bad, SIGBUS, 0, "unknown 7" }, }; +/* + * fn should return 0 from any software breakpoint and hw + * breakpoint/watchpoint handler if it does not expect a single step stage + * and 1 if it expects single step followed by its execution. A single step + * handler should always return 0. All handler should return a -ve error in + * any other case. + */ void __init hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) @@ -665,6 +672,8 @@ void __init hook_debug_fault_code(int nr, debug_fault_info[nr].name = name; } +static DEFINE_PER_CPU(bool, irq_enable_needed); + asmlinkage int __exception do_debug_exception(unsigned long addr, unsigned int esr, struct pt_regs *regs) @@ -672,6 +681,7 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr); struct siginfo info; int rv; + bool *irq_en_needed = this_cpu_ptr(&irq_enable_needed); /* * Tell lockdep we disabled irqs in entry.S. Do nothing if they were @@ -680,9 +690,8 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, if (interrupts_enabled(regs)) trace_hardirqs_off(); - if (!inf->fn(addr, esr, regs)) { - rv = 1; - } else { + rv = inf->fn(addr, esr, regs); + if (rv < 0) { pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n", inf->name, esr, addr); @@ -691,7 +700,12 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, info.si_code = inf->code; info.si_addr = (void __user *)addr; arm64_notify_die("", regs, &info, 0); - rv = 0; + } else if (rv == 1 && interrupts_enabled(regs)) { + regs->pstate |= PSR_I_BIT; + *irq_en_needed = true; + } else if (rv == 0 && *irq_en_needed) { + regs->pstate &= ~PSR_I_BIT; + *irq_en_needed = false; } if (interrupts_enabled(regs))