Message ID | 09e394aa9368227a45144f169a680747a454c95b.1554757135.git.stefan@agner.ch (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/3] ARM: use arch_extension directive instead of arch argument | expand |
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S index 8b2fbc8b6bc6..2d962fe48821 100644 --- a/arch/arm/mach-mvebu/coherency_ll.S +++ b/arch/arm/mach-mvebu/coherency_ll.S @@ -66,7 +66,7 @@ ENDPROC(ll_get_coherency_base) * fabric registers */ ENTRY(ll_get_coherency_cpumask) - mrc 15, 0, r3, cr0, cr0, 5 + mrc p15, 0, r3, cr0, cr0, 5 and r3, r3, #15 mov r2, #(1 << 24) lsl r3, r2, r3 diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S index c1fb713e9306..7aae9a25cfeb 100644 --- a/arch/arm/mach-mvebu/pmsu_ll.S +++ b/arch/arm/mach-mvebu/pmsu_ll.S @@ -16,7 +16,7 @@ ENTRY(armada_38x_scu_power_up) mrc p15, 4, r1, c15, c0 @ get SCU base address orr r1, r1, #0x8 @ SCU CPU Power Status Register - mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID + mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID and r0, r0, #15 add r1, r1, r0 mov r0, #0x0