From patchwork Fri Feb 1 11:10:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hyok S. Choi" X-Patchwork-Id: 2079311 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 410E3DFE75 for ; Fri, 1 Feb 2013 11:13:42 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1EVd-00027E-65; Fri, 01 Feb 2013 11:10:17 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1EVY-00026g-V7 for linux-arm-kernel@lists.infradead.org; Fri, 01 Feb 2013 11:10:14 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MHJ00GNQGCP4WT0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 01 Feb 2013 20:10:07 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.41]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 0F.57.03880.F82AB015; Fri, 01 Feb 2013 20:10:07 +0900 (KST) X-AuditID: cbfee61b-b7fb06d000000f28-83-510ba28fa613 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id EE.57.03880.F82AB015; Fri, 01 Feb 2013 20:10:07 +0900 (KST) Received: from DOHYOKCHOI03 ([168.219.193.154]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MHJ00HDAGCV2E30@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 01 Feb 2013 20:10:07 +0900 (KST) From: "Hyok S. Choi" To: 'Will Deacon' , linux-arm-kernel@lists.infradead.org References: <1359556069-28289-1-git-send-email-will.deacon@arm.com> <1359556069-28289-4-git-send-email-will.deacon@arm.com> In-reply-to: <1359556069-28289-4-git-send-email-will.deacon@arm.com> Subject: RE: [PATCH 3/6] ARM: mm: fix numerous hideous errors in proc-arm740.S Date: Fri, 01 Feb 2013 20:10:05 +0900 Organization: Samsung Electronics Message-id: <0c4201ce006c$b091dba0$11b592e0$@samsung.com> MIME-version: 1.0 X-Mailer: Microsoft Outlook 14.0 Thread-index: AQLJJ3uj7NSS9TPPu2e4X5SSJ1VXjgJLDZAllloAGgA= Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNIsWRmVeSWpSXmKPExsVy+t8zTd3+RdyBBo09WhabHl9jdWD02Lyk PoAxissmJTUnsyy1SN8ugSvj+5/3LAUXpSpO9n1naWDcK9LFyMkhIWAicWbHDWYIW0ziwr31 bF2MXBxCAssYJc7uf8MEU/Tx8FxWiMQiRonlFxczQjgrmCRefelmBakSEpCXuPriHxuIzSag I7HsxTV2EFtEwFdiXuc3FoiaWol9H1aATeUUcJH49PYImC0s4Cex//MasDNYBFQlzn9/BVbP L6AocfXHY0YQm1fAUuLIki3sELagxI/J98BqmAW0JNbvPM4EYctLbF7zFuodBYkdZ18zQtxg JdG57DI7RI2IxL4X78AekBBYxy6xb89mqMUCEt8mHwIaygGUkJXYdABqjqTEwRU3WCYwSs5C snoWktWzkKyehWTFAkaWVYyiqQXJBcVJ6blGesWJucWleel6yfm5mxghUSe9g3FVg8UhRgEO RiUe3hM/uQKFWBPLiitzDzFKcDArifDa1nIHCvGmJFZWpRblxxeV5qQWH2JMBjp2IrOUaHI+ MCHklcQbGhsYGxpaGpqZWpoakCasJM7LeOpJgJBAemJJanZqakFqEcwWJg5OqQZG/7OJNk/C PS6+TpjDnOF28n79rjmvL+7e6KG3WS91zvwXSQo28et486wzdzKHxi97FhhmF/EuJvum5Gth pRKbrUbOZha/731eGOWkt6Xj4wLLV/obZPYo68ydfk5P6FTqCRbn39F/DsZZ93x2fcmxuy3S RGndrJVnDE9W65wqsustfh39r/OCEktxRqKhFnNRcSIAxiU2Kf4CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprFKsWRmVeSWpSXmKPExsVy+t9jAd3+RdyBBv8fKFtsenyN1YHRY/OS +gDGqAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zByg qUoKZYk5pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwjrGjO9/3rMUXJSqONn3naWB ca9IFyMnh4SAicTHw3NZIWwxiQv31rN1MXJxCAksYpRYfnExI4Szgkni1ZdusCohAXmJqy/+ sYHYbAI6EsteXGMHsUUEfCXmdX5jgaipldj3YQUTiM0p4CLx6e0RMFtYwE9i/+c1zCA2i4Cq xPnvr8Dq+QUUJa7+eMwIYvMKWEocWbKFHcIWlPgx+R5YDbOAlsT6nceZIGx5ic1r3jJDXK0g sePsa0aIG6wkOpddZoeoEZHY9+Id4wRG4VlIRs1CMmoWklGzkLQsYGRZxSiaWpBcUJyUnmuk V5yYW1yal66XnJ+7iREc08+kdzCuarA4xCjAwajEw3viJ1egEGtiWXFl7iFGCQ5mJRFe21ru QCHelMTKqtSi/Pii0pzU4kOMyUBfT2SWEk3OB6abvJJ4Q2MTMyNLIzNjE3NjY9KElcR5GU89 CRASSE8sSc1OTS1ILYLZwsTBKdXAGLdKY+3qlW0LTSt2Oga9XWm14vBVjfjEub906zWFfix2 Nj3yuXyZ9rWI3S9PWX6NvrVqg0xJkW1CnOC6HoW4wMcdoUtW5IXx6znrntk8/2f+1JR37jwn rSpaw2XEn0SVn2E7HmA+z1j1joL8yeq7F99l/6l9It98kfubW1HPsdN/Z1h73/DsVWIpzkg0 1GIuKk4EAE/chE0tAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130201_061013_234193_B36ED848 X-CRM114-Status: GOOD ( 11.88 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: hyok.choi@samsung.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hmm, in previous years, for arm7xx platforms, boot up was not done by typical bootloaders. I've read the code and seems good to me to add "Acked-by". Hyok -----Original Message----- From: Will Deacon [mailto:will.deacon@arm.com] Sent: Wednesday, January 30, 2013 11:28 PM To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon; Hyok S. Choi Subject: [PATCH 3/6] ARM: mm: fix numerous hideous errors in proc-arm740.S The setup code in proc-arm740.S is completely broken and, as far as I can tell, always has been. I was >this< close to ripping it out, when a 740t core-tile materialised in the office, so I've had a crack at fixing things up: - Fix the ram/flash area calculations so that we actually set the condition flags before testing them... - Fix the proc_info structure so that __cpu_io_mmu_flags are defined as 0, placing the __cpu_flush pointer at the correct offset - Re-number the registers used during __arm740_setup so that we don't clobber the machine ID et al - Advertise Thumb support via the hwcaps, since 740T is the only 740 implementation. Cc: Hyok S. Choi Signed-off-by: Will Deacon --- arch/arm/mm/proc-arm740.S | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) orr r0, r0, #1 @ set enable bit - mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH +2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH mov r0, #0x06 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable @@ -137,10 +140,11 @@ __arm740_proc_info: .long 0x41807400 .long 0xfffffff0 .long 0 + .long 0 b __arm740_setup .long cpu_arch_name .long cpu_elf_name - .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT + .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT .long cpu_arm740_name .long arm740_processor_functions .long 0 -- 1.8.0 diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index 2088234..fde2d2a 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S @@ -77,24 +77,27 @@ __arm740_setup: mcr p15, 0, r0, c6, c0 @ set area 0, default ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM - ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) - mov r2, #10 @ 11 is the minimum (4KB) -1: add r2, r2, #1 @ area size *= 2 - mov r1, r1, lsr #1 + ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) + mov r4, #10 @ 11 is the minimum (4KB) +1: add r4, r4, #1 @ area size *= 2 + movs r3, r3, lsr #1 bne 1b @ count not zero r-shift - orr r0, r0, r2, lsl #1 @ the area register value + orr r0, r0, r4, lsl #1 @ the area register value orr r0, r0, #1 @ set enable bit mcr p15, 0, r0, c6, c1 @ set area 1, RAM ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH - ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB) - mov r2, #10 @ 11 is the minimum (4KB) -1: add r2, r2, #1 @ area size *= 2 - mov r1, r1, lsr #1 + ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB) + cmp r3, #0 + moveq r0, #0 + beq 2f + mov r4, #10 @ 11 is the minimum (4KB) +1: add r4, r4, #1 @ area size *= 2 + movs r3, r3, lsr #1 bne 1b @ count not zero r-shift - orr r0, r0, r2, lsl #1 @ the area register value + orr r0, r0, r4, lsl #1 @ the area register value