From patchwork Wed Jul 20 18:28:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 9241115 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 995076077C for ; Thu, 21 Jul 2016 08:17:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 888F22074F for ; Thu, 21 Jul 2016 08:17:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7CF5A27C0B; Thu, 21 Jul 2016 08:17:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=2.0 tests=BAYES_00, DATE_IN_PAST_12_24, FREEMAIL_FROM,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 396952074F for ; Thu, 21 Jul 2016 08:17:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQ98b-0007gG-SM; Thu, 21 Jul 2016 08:15:21 +0000 Received: from smtp4-g21.free.fr ([2a01:e0c:1:1599::13]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQ98B-0006ZK-Ia for linux-arm-kernel@lists.infradead.org; Thu, 21 Jul 2016 08:14:57 +0000 Received: from localhost (unknown [IPv6:2a01:e35:2f5c:9de0:4641:5d4e:ba5d:2fa9]) by smtp4-g21.free.fr (Postfix) with ESMTP id 5128119F4B5; Thu, 21 Jul 2016 10:16:42 +0200 (CEST) X-Mailbox-Line: From 0ddc5f7d9a42515f901c95b8c0c1f5a5e4d575e9 Mon Sep 17 00:00:00 2001 Message-Id: <0ddc5f7d9a42515f901c95b8c0c1f5a5e4d575e9.1469082481.git.moinejf@free.fr> In-Reply-To: References: From: Jean-Francois Moine Date: Wed, 20 Jul 2016 20:28:47 +0200 Subject: [PATCH 3/3] mmc: sunxi: Add support to the Allwinner A83T To: Ulf Hansson , Maxime Ripard , Chen-Yu Tsai X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160721_011455_885293_A9D339CF X-CRM114-Status: GOOD ( 10.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The rate of the PLL-PERIPH clock is usually set to 1.2GHz in the A83T. This patch sets the phase delays of the output and sample clocks accordingly. Signed-off-by: Jean-Francois Moine --- Note: The impacted phase delays are only for 50MHz. The phase delays are not used in 50MHz 8 bits DDR (new timing mode). --- drivers/mmc/host/sunxi-mmc.c | 11 +++++++++++ 1 file changed, 11 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 7f9c31a..e161a64 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -961,6 +961,7 @@ static int sunxi_mmc_card_busy(struct mmc_host *mmc) static const struct of_device_id sunxi_mmc_of_match[] = { { .compatible = "allwinner,sun4i-a10-mmc", }, { .compatible = "allwinner,sun5i-a13-mmc", }, + { .compatible = "allwinner,sun8i-a83t-mmc", }, { .compatible = "allwinner,sun9i-a80-mmc", }, { /* sentinel */ } }; @@ -986,6 +987,14 @@ static const struct sunxi_mmc_clk_delay sunxi_mmc_clk_delays[] = { [SDXC_CLK_50M_DDR_8BIT] = { .output = 90, .sample = 180 }, }; +static const struct sunxi_mmc_clk_delay sun8i_a83t_mmc_clk_delays[] = { + [SDXC_CLK_400K] = { .output = 180, .sample = 180 }, + [SDXC_CLK_25M] = { .output = 180, .sample = 75 }, + [SDXC_CLK_50M] = { .output = 90, .sample = 105 }, + [SDXC_CLK_50M_DDR] = { .output = 60, .sample = 120 }, + [SDXC_CLK_50M_DDR_8BIT] = { .output = 180, .sample = 180 }, +}; + static const struct sunxi_mmc_clk_delay sun9i_mmc_clk_delays[] = { [SDXC_CLK_400K] = { .output = 180, .sample = 180 }, [SDXC_CLK_25M] = { .output = 180, .sample = 75 }, @@ -1007,6 +1016,8 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host, if (of_device_is_compatible(np, "allwinner,sun9i-a80-mmc")) host->clk_delays = sun9i_mmc_clk_delays; + else if (of_device_is_compatible(np, "allwinner,sun8i-a83t-mmc")) + host->clk_delays = sun8i_a83t_mmc_clk_delays; else host->clk_delays = sunxi_mmc_clk_delays;