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Tue, 17 Dec 2013 20:52:36 +0900 (KST) Received: from DOKGENEKIM03 ([12.23.120.199]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MXY00LKR8ZOHV00@mmp2.samsung.com>; Tue, 17 Dec 2013 20:52:36 +0900 (KST) From: kgene@kernel.org To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 07/11] ARM: EXYNOS: local definitions for pm.c into mach-exynos dir Date: Tue, 17 Dec 2013 20:52:36 +0900 Message-id: <116501cefb1e$7a9c3010$6fd49030$@kernel.org> MIME-version: 1.0 X-Mailer: Microsoft Outlook 14.0 Thread-index: Ac77Hnp7q3xPo+s5QBm672Th7QEsVw== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLIsWRmVeSWpSXmKPExsVy+t8zY10W6w1BBu8e6FtsenyN1WLG+X1M Dkwem5fUe3zeJBfAFMVlk5Kak1mWWqRvl8CV8XfCTaaCBXIV95e3sDUwfpPsYuTkkBAwkWho vMoOYYtJXLi3ng3EFhJYxigxbQovTM2NrZ1AcS6g+HRGif63H5khiv4yStz7GdnFyMHBBtQ8 9Yk0SFhYQEti4ZYmFpCwiIC3xPJrihDhUInOJbfAOlkEVCU2Nj5nAinhFbCQmPgiFiTMKyAo 8WPyPRYQmxloyvqdx5kgbHmJzWveMkNcoyCx4+xrRhBbREBP4uWN+VA1IhL7XrxjBLlSQmAy u8TUK//YIXYJSHybfAjsHAkBWYlNB6DmSEocXHGDZQKj2Cwkq2chWT0LyepZSFYsYGRZxSia WpBcUJyUXmSoV5yYW1yal66XnJ+7iRESNb07GG8fsD7EmAy0fiKzlGhyPjDq8kriDY3NjCxM TUyNjcwtzUgTVhLnTXqYFCQkkJ5YkpqdmlqQWhRfVJqTWnyIkYmDU6qBkW+m5PyYH10HeRp/ 9+d9LuMIWRe+LItLYG951tJjG3YUW3VM2/tx1sVWpmxOV/OFBSye1ud3Tfae6ay4UWWlfdzh P4/2uhzZsduwQ2CJxvOX6pcFr34JPl5TejT9/IrLN/uEs45r/XKcvu3Hz732B9y5lonzsArn mp0UUm2cdub4OokvvZdKdyqxFGckGmoxFxUnAgAFffpWsAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNIsWRmVeSWpSXmKPExsVy+t9jQV0W6w1BBrMuaVtsenyN1WLG+X1M Dkwem5fUe3zeJBfAFNXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtq q+TiE6DrlpkDNF5JoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjHmPF3wk2m ggVyFfeXt7A1MH6T7GLk5JAQMJG4sbWTDcIWk7hwbz2QzcUhJDCdUaL/7UdmkISQwF9GiXs/ I7sYOTjYgIqmPpEGCQsLaEks3NLEAhIWEfCWWH5NESIcKtG55BZYJ4uAqsTGxudMICW8AhYS E1/EgoR5BQQlfky+xwJiMwNNWb/zOBOELS+xec1bZohrFCR2nH3NCGKLCOhJvLwxH6pGRGLf i3eMExgFZiEZNQvJqFlIRs1C0rKAkWUVo2hqQXJBcVJ6rpFecWJucWleul5yfu4mRnBUPpPe wbiqweIQowAHoxIPL8fs9UFCrIllxZW5hxglOJiVRHilrDYECfGmJFZWpRblxxeV5qQWH2JM Bnp0IrOUaHI+MGHklcQbGpuYGVkamVkYmZibkyasJM57sNU6UEggPbEkNTs1tSC1CGYLEwen VAPj9JRn+nkpikd4rv3ZlqDm9/PIk77PG1ZvMdITtkxyeHJg00+WL6tSNXg/OE8weNb35ODe a7+f1S8UmNmw4X61V8jtZ35J6nE9nbGzj/Jzb2H9t2CacHBvyPPdd4V8NgRZlXJejF+2g+3S iSZv8bSUU2ws1Zz/82Kvt/g/MwpvZi9l9db6Mu+QEktxRqKhFnNRcSIAFxYK0w4DAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131217_065258_093945_B72E28F2 X-CRM114-Status: GOOD ( 11.41 ) X-Spam-Score: -7.4 (-------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kukjin Kim Some of definitions in the regs-clock.h are used only for pm.c, so this moves them into the file. Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/include/mach/regs-clock.h | 26 ------------------------ arch/arm/mach-exynos/pm.c | 26 +++++++++++++++++++++++- 2 files changed, 25 insertions(+), 27 deletions(-) static struct sleep_save exynos4_set_clksrc[] = { { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, }, { .reg = EXYNOS4_CLKSRC_MASK_CAM , .val = 0x11111111, }, diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index 855f1b2..5acc06e 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h @@ -18,25 +18,6 @@ #define EXYNOS_CLKREG(x) (S5P_VA_CMU + (x)) -#define EXYNOS4_EPLL_LOCK EXYNOS_CLKREG(0x0C010) -#define EXYNOS4_VPLL_LOCK EXYNOS_CLKREG(0x0C020) - -#define EXYNOS4_EPLL_CON0 EXYNOS_CLKREG(0x0C110) -#define EXYNOS4_EPLL_CON1 EXYNOS_CLKREG(0x0C114) -#define EXYNOS4_VPLL_CON0 EXYNOS_CLKREG(0x0C120) -#define EXYNOS4_VPLL_CON1 EXYNOS_CLKREG(0x0C124) - -#define EXYNOS4_CLKSRC_MASK_TOP EXYNOS_CLKREG(0x0C310) -#define EXYNOS4_CLKSRC_MASK_CAM EXYNOS_CLKREG(0x0C320) -#define EXYNOS4_CLKSRC_MASK_TV EXYNOS_CLKREG(0x0C324) -#define EXYNOS4_CLKSRC_MASK_LCD0 EXYNOS_CLKREG(0x0C334) -#define EXYNOS4_CLKSRC_MASK_MAUDIO EXYNOS_CLKREG(0x0C33C) -#define EXYNOS4_CLKSRC_MASK_FSYS EXYNOS_CLKREG(0x0C340) -#define EXYNOS4_CLKSRC_MASK_PERIL0 EXYNOS_CLKREG(0x0C350) -#define EXYNOS4_CLKSRC_MASK_PERIL1 EXYNOS_CLKREG(0x0C354) - -#define EXYNOS4_CLKSRC_MASK_DMC EXYNOS_CLKREG(0x10300) - #define EXYNOS4_CLKSRC_CPU EXYNOS_CLKREG(0x14200) #define EXYNOS4_CLKMUX_STATCPU EXYNOS_CLKREG(0x14400) @@ -45,16 +26,9 @@ #define EXYNOS4_CLKDIV_STATCPU EXYNOS_CLKREG(0x14600) #define EXYNOS4_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x14604) -#define EXYNOS4_EPLLCON0_LOCKED_SHIFT (29) -#define EXYNOS4_VPLLCON0_LOCKED_SHIFT (29) - #define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16) #define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT) -/* Only for EXYNOS4210 */ - -#define EXYNOS4210_CLKSRC_MASK_LCD1 EXYNOS_CLKREG(0x0C338) - /* For EXYNOS5250 */ #define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index d4a3368..7f89213 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -29,12 +29,36 @@ #include #include -#include +#include #include #include "common.h" #include "regs-pmu.h" +#define EXYNOS4_EPLL_LOCK (S5P_VA_CMU + 0x0C010) +#define EXYNOS4_VPLL_LOCK (S5P_VA_CMU + 0x0C020) + +#define EXYNOS4_EPLL_CON0 (S5P_VA_CMU + 0x0C110) +#define EXYNOS4_EPLL_CON1 (S5P_VA_CMU + 0x0C114) +#define EXYNOS4_VPLL_CON0 (S5P_VA_CMU + 0x0C120) +#define EXYNOS4_VPLL_CON1 (S5P_VA_CMU + 0x0C124) + +#define EXYNOS4_CLKSRC_MASK_TOP (S5P_VA_CMU + 0x0C310) +#define EXYNOS4_CLKSRC_MASK_CAM (S5P_VA_CMU + 0x0C320) +#define EXYNOS4_CLKSRC_MASK_TV (S5P_VA_CMU + 0x0C324) +#define EXYNOS4_CLKSRC_MASK_LCD0 (S5P_VA_CMU + 0x0C334) +#define EXYNOS4_CLKSRC_MASK_MAUDIO (S5P_VA_CMU + 0x0C33C) +#define EXYNOS4_CLKSRC_MASK_FSYS (S5P_VA_CMU + 0x0C340) +#define EXYNOS4_CLKSRC_MASK_PERIL0 (S5P_VA_CMU + 0x0C350) +#define EXYNOS4_CLKSRC_MASK_PERIL1 (S5P_VA_CMU + 0x0C354) + +#define EXYNOS4_CLKSRC_MASK_DMC (S5P_VA_CMU + 0x10300) + +#define EXYNOS4_EPLLCON0_LOCKED_SHIFT (29) +#define EXYNOS4_VPLLCON0_LOCKED_SHIFT (29) + +#define EXYNOS4210_CLKSRC_MASK_LCD1 (S5P_VA_CMU + 0x0C338) +