From patchwork Thu Jun 2 00:19:33 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 842432 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p520R2ME003962 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 2 Jun 2011 00:27:23 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRvjS-0008Kz-SG; Thu, 02 Jun 2011 00:25:51 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QRvfb-0005Ey-3D; Thu, 02 Jun 2011 00:21:51 +0000 Received: from na3sys009aog102.obsmtp.com ([74.125.149.69]) by canuck.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRvdm-0004i0-TS for linux-arm-kernel@lists.infradead.org; Thu, 02 Jun 2011 00:20:00 +0000 Received: from mail-px0-f174.google.com ([209.85.212.174]) (using TLSv1) by na3sys009aob102.postini.com ([74.125.148.12]) with SMTP ID DSNKTebXLVGoYZjAISYdo1qkdBIX023askXx@postini.com; Wed, 01 Jun 2011 17:19:58 PDT Received: by mail-px0-f174.google.com with SMTP id 15so220564pxi.33 for ; Wed, 01 Jun 2011 17:19:57 -0700 (PDT) Received: by 10.68.65.36 with SMTP id u4mr40706pbs.156.1306973997740; Wed, 01 Jun 2011 17:19:57 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net [24.19.7.36]) by mx.google.com with ESMTPS id i7sm75099pbj.10.2011.06.01.17.19.56 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 01 Jun 2011 17:19:56 -0700 (PDT) From: Kevin Hilman To: Ben Dooks , linux-i2c@vger.kernel.org Subject: [PATCH v4 07/18] I2C: OMAP2+: Pass hwmod rev knowledge via platform_data when i2c bus added Date: Wed, 1 Jun 2011 17:19:33 -0700 Message-Id: <1306973984-15165-8-git-send-email-khilman@ti.com> X-Mailer: git-send-email 1.7.4 In-Reply-To: <1306973984-15165-1-git-send-email-khilman@ti.com> References: <1306973984-15165-1-git-send-email-khilman@ti.com> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110601_201959_248727_5F88C985 X-CRM114-Status: GOOD ( 12.79 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.69 listed in list.dnswl.org] Cc: linux-omap@vger.kernel.org, Andy Green , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 02 Jun 2011 00:27:23 +0000 (UTC) From: Andy Green Mark each OMAP I2C bus with the hwmod's knowledge of which I2C IP version is in the chip we're running on. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Signed-off-by: Kevin Hilman --- arch/arm/plat-omap/i2c.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index a938df0..0d3eda7 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -155,6 +155,12 @@ static inline int omap2_i2c_add_bus(int bus_id) pdata = &i2c_pdata[bus_id - 1]; /* + * pass the hwmod class's CPU-specific knowledge of I2C IP revision in + * use up to the OMAP I2C driver via platform data + */ + pdata->rev = oh->class->rev; + + /* * When waiting for completion of a i2c transfer, we need to * set a wake up latency constraint for the MPU. This is to * ensure quick enough wakeup from idle, when transfer