From patchwork Sat Jun 4 19:03:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin Cross X-Patchwork-Id: 849362 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p54J4ZUt028768 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 4 Jun 2011 19:05:02 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QSw91-0006FK-R1; Sat, 04 Jun 2011 19:04:23 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QSw91-0003mh-HW; Sat, 04 Jun 2011 19:04:23 +0000 Received: from smtp-out.google.com ([216.239.44.51]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QSw8x-0003mN-1x for linux-arm-kernel@lists.infradead.org; Sat, 04 Jun 2011 19:04:20 +0000 Received: from kpbe16.cbf.corp.google.com (kpbe16.cbf.corp.google.com [172.25.105.80]) by smtp-out.google.com with ESMTP id p54J46Jn026854; Sat, 4 Jun 2011 12:04:06 -0700 Received: from walnut.mtv.corp.google.com (walnut.mtv.corp.google.com [172.18.102.62]) by kpbe16.cbf.corp.google.com with ESMTP id p54J447n013342; Sat, 4 Jun 2011 12:04:04 -0700 Received: by walnut.mtv.corp.google.com (Postfix, from userid 99897) id 364872578EC; Sat, 4 Jun 2011 12:04:04 -0700 (PDT) From: Colin Cross To: linux-omap@vger.kernel.org Subject: [PATCH] ARM: omap4: gpio: fix setting IRQWAKEN bits Date: Sat, 4 Jun 2011 12:03:59 -0700 Message-Id: <1307214239-16316-1-git-send-email-ccross@android.com> X-Mailer: git-send-email 1.7.4.1 X-System-Of-Record: true X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110604_150419_437043_91E08EAA X-CRM114-Status: GOOD ( 11.41 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [216.239.44.51 listed in list.dnswl.org] Cc: Tony Lindgren , Russell King , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Colin Cross X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sat, 04 Jun 2011 19:05:03 +0000 (UTC) Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits, causing only the last bit set to take effect, resulting in lost wakeups when the GPIO controller is in idle. Replace direct writes to IRQWAKEN with writes to SETWKUENA and CLEARWKUEN. Signed-off-by: Colin Cross Acked-by: Santosh Shilimkar --- arch/arm/plat-omap/gpio.c | 14 +++++--------- 1 files changed, 5 insertions(+), 9 deletions(-) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index c985652..23ac7b6 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -539,7 +539,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, { void __iomem *base = bank->base; u32 gpio_bit = 1 << gpio; - u32 val; if (cpu_is_omap44xx()) { MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit, @@ -563,14 +562,11 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { if (cpu_is_omap44xx()) { if (trigger != 0) - __raw_writel(1 << gpio, bank->base+ - OMAP4_GPIO_IRQWAKEN0); - else { - val = __raw_readl(bank->base + - OMAP4_GPIO_IRQWAKEN0); - __raw_writel(val & (~(1 << gpio)), bank->base + - OMAP4_GPIO_IRQWAKEN0); - } + __raw_writel(gpio_bit, + bank->base + OMAP4_GPIO_SETWKUENA); + else + __raw_writel(gpio_bit, + bank->base + OMAP4_GPIO_CLEARWKUENA); } else { /* * GPIO wakeup request can only be generated on edge