From patchwork Wed Jun 8 11:23:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Govindraj.R" X-Patchwork-Id: 862392 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p58JGMRr019763 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 8 Jun 2011 19:16:43 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QUGsv-0005OD-Eb; Wed, 08 Jun 2011 11:25:18 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QUGsu-0001Mm-Vq; Wed, 08 Jun 2011 11:25:16 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QUGrM-000136-1o for linux-arm-kernel@lists.infradead.org; Wed, 08 Jun 2011 11:23:44 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p58BNYnZ023187 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 8 Jun 2011 06:23:37 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p58BNWY2012610; Wed, 8 Jun 2011 16:53:34 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Wed, 8 Jun 2011 16:53:33 +0530 Received: from localhost.localdomain (omapldc12.india.ti.com [172.24.136.100]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p58BNT7r028360; Wed, 8 Jun 2011 16:53:33 +0530 (IST) From: "Govindraj.R" To: , , Subject: [PATCH v3 06/12] Serial: OMAP2+: Move erratum handling from serial.c Date: Wed, 8 Jun 2011 16:53:08 +0530 Message-ID: <1307532194-13039-7-git-send-email-govindraj.raja@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1307532194-13039-1-git-send-email-govindraj.raja@ti.com> References: <1307532194-13039-1-git-send-email-govindraj.raja@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110608_072340_583234_97795042 X-CRM114-Status: GOOD ( 15.45 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [198.47.26.152 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: Tony Lindgren , Kevin Hilman , "Govindraj.R" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 08 Jun 2011 19:16:43 +0000 (UTC) Move the erratum handling mechanism from serial.c to driver file and utilise the same func. in driver file. Acked-by: Alan Cox Signed-off-by: Govindraj.R --- drivers/tty/serial/omap-serial.c | 57 ++++++++++++++++++++++++++++++++++--- 1 files changed, 52 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index ee94291..2ad8fa0 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -52,6 +52,7 @@ static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; static void uart_tx_dma_callback(int lch, u16 ch_status, void *data); static void serial_omap_rx_timeout(unsigned long uart_no); static int serial_omap_start_rxdma(struct uart_omap_port *up); +static void omap_uart_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); static inline unsigned int serial_in(struct uart_omap_port *up, int offset) { @@ -807,7 +808,11 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, serial_out(up, UART_MCR, up->mcr); /* Protocol, Baud Rate, and Interrupt Settings */ - serial_out(up, UART_OMAP_MDR1, up->mdr1); + if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(up, up->mdr1); + else + serial_out(up, UART_OMAP_MDR1, up->mdr1); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); up->efr = serial_in(up, UART_EFR); @@ -832,7 +837,10 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, else up->mdr1 = UART_OMAP_MDR1_16X_MODE; - serial_out(up, UART_OMAP_MDR1, up->mdr1) + if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(up, up->mdr1); + else + serial_out(up, UART_OMAP_MDR1, up->mdr1); /* Hardware Flow Control Configuration */ @@ -1447,11 +1455,48 @@ static int serial_omap_remove(struct platform_device *dev) return 0; } +/* + * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6) + * The access to uart register after MDR1 Access + * causes UART to corrupt data. + * + * Need a delay = + * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) + * give 10 times as much + */ +static void omap_uart_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) +{ + u8 timeout = 255; + + serial_out(up, UART_OMAP_MDR1, mdr1); + udelay(2); + serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | + UART_FCR_CLEAR_RCVR); + /* + * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and + * TX_FIFO_E bit is 1. + */ + while (UART_LSR_THRE != (serial_in(up, UART_LSR) & + (UART_LSR_THRE | UART_LSR_DR))) { + timeout--; + if (!timeout) { + /* Should *never* happen. we warn and carry on */ + dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n", + serial_in(up, UART_LSR)); + break; + } + udelay(1); + } +} + static void omap_uart_restore_context(struct uart_omap_port *up) { u16 efr = 0; - serial_out(up, UART_OMAP_MDR1, up->mdr1); + if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); + else + serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); serial_out(up, UART_LCR, 0xBF); /* Config B mode */ efr = serial_in(up, UART_EFR); serial_out(up, UART_EFR, UART_EFR_ECB); @@ -1468,8 +1513,10 @@ static void omap_uart_restore_context(struct uart_omap_port *up) serial_out(up, UART_LCR, 0xBF); /* Config B mode */ serial_out(up, UART_EFR, efr); serial_out(up, UART_LCR, up->lcr); - /* UART 16x mode */ - serial_out(up, UART_OMAP_MDR1, up->mdr1); + if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) + omap_uart_mdr1_errataset(up, up->mdr1); + else + serial_out(up, UART_OMAP_MDR1, up->mdr1); } static int omap_serial_runtime_suspend(struct device *dev)