From patchwork Thu Jun 9 17:21:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot for Dave Martin X-Patchwork-Id: 866182 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p59HN2Ft016193 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 9 Jun 2011 17:23:23 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QUiwN-0001xb-H6; Thu, 09 Jun 2011 17:22:44 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QUiwM-0003SY-8M; Thu, 09 Jun 2011 17:22:42 +0000 Received: from mail-wy0-f177.google.com ([74.125.82.177]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QUivn-0003M6-Fu for linux-arm-kernel@lists.infradead.org; Thu, 09 Jun 2011 17:22:09 +0000 Received: by wyb28 with SMTP id 28so1737505wyb.36 for ; Thu, 09 Jun 2011 10:22:05 -0700 (PDT) Received: by 10.227.69.194 with SMTP id a2mr1076602wbj.57.1307640124986; Thu, 09 Jun 2011 10:22:04 -0700 (PDT) Received: from e200948.peterhouse.linaro.org (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id fw15sm1383187wbb.27.2011.06.09.10.22.03 (version=SSLv3 cipher=OTHER); Thu, 09 Jun 2011 10:22:04 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 2/2] ARM: proc-v7: Use the new proc_info declaration macro Date: Thu, 9 Jun 2011 18:21:52 +0100 Message-Id: <1307640112-5360-3-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307640112-5360-1-git-send-email-dave.martin@linaro.org> References: <1307640112-5360-1-git-send-email-dave.martin@linaro.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110609_132207_841722_36561ACB X-CRM114-Status: GOOD ( 10.05 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.177 listed in list.dnswl.org] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 09 Jun 2011 17:23:23 +0000 (UTC) Signed-off-by: Dave Martin --- arch/arm/mm/proc-v7.S | 93 ++++++++++++++++++++----------------------------- 1 files changed, 38 insertions(+), 55 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index b3b566e..9e8569c 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -171,8 +171,6 @@ ENTRY(cpu_v7_set_pte_ext) mov pc, lr ENDPROC(cpu_v7_set_pte_ext) -cpu_v7_name: - .ascii "ARMv7 Processor" .align /* @@ -421,78 +419,63 @@ ENTRY(v7_processor_functions) .word 0 .size v7_processor_functions, . - v7_processor_functions - .section ".rodata" - - .type cpu_arch_name, #object -cpu_arch_name: - .asciz "armv7" - .size cpu_arch_name, . - cpu_arch_name - - .type cpu_elf_name, #object -cpu_elf_name: - .asciz "v7" - .size cpu_elf_name, . - cpu_elf_name - .align - - .section ".proc.info.init", #alloc, #execinstr - - .type __v7_ca9mp_proc_info, #object -__v7_ca9mp_proc_info: - .long 0x410fc090 @ Required ID value - .long 0xff0ffff0 @ Mask for ID - ALT_SMP(.long \ +proc_info __v7_ca9mp_proc_info + cpu_val 0x410fc090 @ Required ID value + cpu_mask 0xff0ffff0 @ Mask for ID + __cpu_mm_mmu_flags_smp \ PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ + PMD_FLAGS_SMP + __cpu_mm_mmu_flags_up \ PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) - .long PMD_TYPE_SECT | \ + PMD_FLAGS_UP + __cpu_io_mmu_flags \ + PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ - W(b) __v7_ca9mp_setup - .long cpu_arch_name - .long cpu_elf_name - .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS - .long cpu_v7_name - .long v7_processor_functions - .long v7wbi_tlb_fns - .long v6_user_fns - .long v7_cache_fns - .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info + __cpu_flush W(b) __v7_ca9mp_setup + arch_name "armv7" + elf_name "v7" + elf_hwcap HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS + cpu_name "ARMv7 Processor" + proc v7_processor_functions + tlb v7wbi_tlb_fns + user v6_user_fns + cache v7_cache_fns +end_proc_info /* * Match any ARMv7 processor core. */ - .type __v7_proc_info, #object -__v7_proc_info: - .long 0x000f0000 @ Required ID value - .long 0x000f0000 @ Mask for ID - ALT_SMP(.long \ +proc_info __v7_proc_info + cpu_val 0x000f0000 @ Required ID value + cpu_mask 0x000f0000 @ Mask for ID + __cpu_mm_mmu_flags_smp \ PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ + PMD_FLAGS_SMP + __cpu_mm_mmu_flags_up \ PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) - .long PMD_TYPE_SECT | \ + PMD_FLAGS_UP + __cpu_io_mmu_flags \ + PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ - W(b) __v7_setup - .long cpu_arch_name - .long cpu_elf_name - .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS - .long cpu_v7_name - .long v7_processor_functions - .long v7wbi_tlb_fns - .long v6_user_fns - .long v7_cache_fns - .size __v7_proc_info, . - __v7_proc_info + __cpu_flush W(b) __v7_setup + arch_name "armv7" + elf_name "v7" + elf_hwcap HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS + cpu_name "ARMv7 Processor" + proc v7_processor_functions + tlb v7wbi_tlb_fns + user v6_user_fns + cache v7_cache_fns +end_proc_info