From patchwork Mon Jun 20 16:48:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 897772 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p5KGhrkr009936 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 20 Jun 2011 16:44:14 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QYhZK-0000j3-Ji; Mon, 20 Jun 2011 16:43:22 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QYhZJ-0005b4-D2; Mon, 20 Jun 2011 16:43:21 +0000 Received: from ch1ehsobe005.messaging.microsoft.com ([216.32.181.185] helo=CH1EHSOBE012.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QYhY9-0005Nf-Nr for linux-arm-kernel@lists.infradead.org; Mon, 20 Jun 2011 16:42:11 +0000 Received: from mail56-ch1-R.bigfish.com (216.32.181.169) by CH1EHSOBE012.bigfish.com (10.43.70.62) with Microsoft SMTP Server id 14.1.225.22; Mon, 20 Jun 2011 16:42:08 +0000 Received: from mail56-ch1 (localhost.localdomain [127.0.0.1]) by mail56-ch1-R.bigfish.com (Postfix) with ESMTP id C135B5B00CB; Mon, 20 Jun 2011 16:42:08 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h65h) X-Spam-TCS-SCL: 4:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail56-ch1 (localhost.localdomain [127.0.0.1]) by mail56-ch1 (MessageSwitch) id 1308588128582234_3432; Mon, 20 Jun 2011 16:42:08 +0000 (UTC) Received: from CH1EHSMHS002.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.243]) by mail56-ch1.bigfish.com (Postfix) with ESMTP id 89CCDDE00AD; Mon, 20 Jun 2011 16:42:08 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS002.bigfish.com (10.43.70.2) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 20 Jun 2011 16:42:08 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.289.8; Mon, 20 Jun 2011 11:41:59 -0500 Received: from localhost.localdomain ([10.29.240.182]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p5KGftAD015774; Mon, 20 Jun 2011 11:41:57 -0500 (CDT) From: Fabio Estevam To: Subject: [PATCH 2/6] ARM: mach-imx/mx27_3ds: Fix regulator support Date: Mon, 20 Jun 2011 13:48:38 -0300 Message-ID: <1308588522-16586-2-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.6.0.4 In-Reply-To: <1308588522-16586-1-git-send-email-fabio.estevam@freescale.com> References: <1308588522-16586-1-git-send-email-fabio.estevam@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110620_124209_990930_82BCC872 X-CRM114-Status: GOOD ( 18.72 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.185 listed in list.dnswl.org] Cc: Fabio Estevam , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Mon, 20 Jun 2011 16:44:14 +0000 (UTC) Fix the 2.8V (VMMC1) and 1.8V (VGEN) voltage generation on mx27_3ds. Also configure the IOMUX for the PMIC interrupt pin and for the CSPI chip select that is connected to the MC13783 PMIC. In order to get the voltage for the LCD (2.8V and 1.8V) it is also necessary to turn on GPO1 and GPO3 supplies because they are connected to switches that enable these two voltages. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/mach-mx27_3ds.c | 25 +++++++++++++++++++++++-- 1 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 5b1e0fc..be68e2d 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -46,6 +46,7 @@ #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) +#define PMIC_INT IMX_GPIO_NR(3, 14) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -193,6 +194,13 @@ static int __init mx27_3ds_otg_mode(char *options) __setup("otg_mode=", mx27_3ds_otg_mode); /* Regulators */ +static struct regulator_init_data gpo_init = { + .constraints = { + .boot_on = 1, + .always_on = 1, + } +}; + static struct regulator_consumer_supply vmmc1_consumers[] = { REGULATOR_SUPPLY("lcd_2v8", NULL), }; @@ -201,7 +209,9 @@ static struct regulator_init_data vmmc1_init = { .constraints = { .min_uV = 2800000, .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), .consumer_supplies = vmmc1_consumers, @@ -215,7 +225,9 @@ static struct regulator_init_data vgen_init = { .constraints = { .min_uV = 1800000, .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, }, .num_consumer_supplies = ARRAY_SIZE(vgen_consumers), .consumer_supplies = vgen_consumers, @@ -228,6 +240,12 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { }, { .id = MC13783_REG_VGEN, .init_data = &vgen_init, + }, { + .id = MC13783_REG_GPO1, /* Turn on 1.8V */ + .init_data = &gpo_init, + }, { + .id = MC13783_REG_GPO3, /* Turn on 3.3V */ + .init_data = &gpo_init, }, }; @@ -287,6 +305,9 @@ static void __init mx27pdk_init(void) if (!otg_mode_host) imx27_add_fsl_usb2_udc(&otg_device_pdata); + + mxc_gpio_mode(SPI2_SS0 | GPIO_GPIO | GPIO_OUT); + mxc_gpio_mode(PMIC_INT | GPIO_GPIO | GPIO_IN); imx27_add_spi_imx1(&spi2_pdata); spi_register_board_info(mx27_3ds_spi_devs,