From patchwork Thu Jun 30 12:25:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Padmavathi Venna X-Patchwork-Id: 931682 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5U6dwpl000886 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 30 Jun 2011 06:40:19 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QcAuT-0003s9-P4; Thu, 30 Jun 2011 06:39:34 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QcAuT-0002jB-7Z; Thu, 30 Jun 2011 06:39:33 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QcAtT-0002YL-Dt for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2011 06:38:32 +0000 Received: from epcpsbgm1.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0LNL00KLCBRPPAC0@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2011 15:38:18 +0900 (KST) X-AuditID: cbfee61a-b7c53ae000002dc1-84-4e0c19da158f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (MMPCPMTA) with SMTP id 00.CE.11713.AD91C0E4; Thu, 30 Jun 2011 15:38:18 +0900 (KST) Received: from localhost.localdomain ([107.108.73.106]) by mmp2.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LNL0026NBR6C8@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2011 15:38:18 +0900 (KST) Date: Thu, 30 Jun 2011 08:25:19 -0400 From: Padmavathi Venna Subject: [PATCH 3/7] ARM: SAMSUNG: Add SPI clock definitions for SAMSUNG SoCs In-reply-to: <1309436723-662-1-git-send-email-padma.v@samsung.com> To: kgene.kim@samsung.com, jassisinghbrar@gmail.com, sbkim73@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Message-id: <1309436723-662-4-git-send-email-padma.v@samsung.com> X-Mailer: git-send-email 1.7.0.4 References: <1309436723-662-1-git-send-email-padma.v@samsung.com> X-Brightmail-Tracker: AAAAAA== X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110630_023831_739734_DD2D711F X-CRM114-Status: GOOD ( 15.84 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [203.254.224.24 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 2.4 DATE_IN_FUTURE_03_06 Date: is 3 to 6 hours after Received: date X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 30 Jun 2011 06:40:19 +0000 (UTC) SPI Clocks were defined in dev-spi.c of machine specific folder. To make SPI devices common across all SoCs,dev-spi.c is moved from machine specific folder to plat-samsung. So SPI clock definitions has been moved from dev-spi.c to SoC specific machine folder for S3C64XX,S5P64X0,S5PC100 and S5PV210 Signed-off-by: Padmavathi Venna --- arch/arm/mach-s3c64xx/include/mach/spi-clocks.h | 6 ++++++ arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 5 +++++ arch/arm/mach-s5pc100/include/mach/spi-clocks.h | 6 ++++++ arch/arm/mach-s5pv210/include/mach/spi-clocks.h | 5 +++++ 4 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h index 9d0c43b..525f96b 100644 --- a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h +++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h @@ -15,4 +15,10 @@ #define S3C64XX_SPI_SRCCLK_SPIBUS 1 #define S3C64XX_SPI_SRCCLK_48M 2 +static char *spi_src_clks[] = { + [S3C64XX_SPI_SRCCLK_PCLK] = "pclk", + [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus", + [S3C64XX_SPI_SRCCLK_48M] = "spi_48m", +}; + #endif /* __S3C64XX_PLAT_SPI_CLKS_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h index 170a20a..3995de1 100644 --- a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h +++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h @@ -17,4 +17,9 @@ #define S5P64X0_SPI_SRCCLK_PCLK 0 #define S5P64X0_SPI_SRCCLK_SCLK 1 +static char *spi_src_clks[] = { + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk", + [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi", +}; + #endif /* __ASM_ARCH_SPI_CLKS_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h index 65e4263..c182b02 100644 --- a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h +++ b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h @@ -15,4 +15,10 @@ #define S5PC100_SPI_SRCCLK_48M 1 #define S5PC100_SPI_SRCCLK_SPIBUS 2 +static char *spi_src_clks[] = { + [S5PC100_SPI_SRCCLK_PCLK] = "pclk", + [S5PC100_SPI_SRCCLK_48M] = "spi_48m", + [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus", +}; + #endif /* __S5PC100_PLAT_SPI_CLKS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h index 02acded..fa17815 100644 --- a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h +++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h @@ -14,4 +14,9 @@ #define S5PV210_SPI_SRCCLK_PCLK 0 #define S5PV210_SPI_SRCCLK_SCLK 1 +static char *spi_src_clks[] = { + [S5PV210_SPI_SRCCLK_PCLK] = "pclk", + [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi", +}; + #endif /* __S5PV210_PLAT_SPI_CLKS_H */