From patchwork Tue Jul 12 22:42:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Todd Poynor X-Patchwork-Id: 969562 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p6CMgdCB022901 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 12 Jul 2011 22:43:00 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qglep-0003lT-Rz; Tue, 12 Jul 2011 22:42:24 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qglep-0006AH-GY; Tue, 12 Jul 2011 22:42:23 +0000 Received: from smtp-out.google.com ([74.125.121.67]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qglel-00069y-UP for linux-arm-kernel@lists.infradead.org; Tue, 12 Jul 2011 22:42:20 +0000 Received: from kpbe13.cbf.corp.google.com (kpbe13.cbf.corp.google.com [172.25.105.77]) by smtp-out.google.com with ESMTP id p6CMgFTL007230; Tue, 12 Jul 2011 15:42:15 -0700 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=google.com; s=beta; t=1310510535; bh=sFrEsDgGevQW4mjL+7ptqWePmfM=; h=From:To:Cc:Subject:Date:Message-Id; b=xUSWfvpy84UCSLbacZRKAj9k0NFIETtDg5NoHoflC06AvSCrgfy3MUwxifVMuQCL+ Z0st8gLTdNE2JFFQplgRg== DomainKey-Signature: a=rsa-sha1; s=beta; d=google.com; c=nofws; q=dns; h=from:to:cc:subject:date:message-id:x-mailer; b=gD3V2vbDxqZ/IWl3Ow/qCRm67fprPnVNrtZ9jqjxFDBdWJTjT+a631q8ZrGrjH2dC mt2LAoagrO0JWG3XJeEXw== Received: from conslugarocko.mtv.corp.google.com (conslugarocko.mtv.corp.google.com [172.18.102.26]) by kpbe13.cbf.corp.google.com with ESMTP id p6CMg8F1013179; Tue, 12 Jul 2011 15:42:08 -0700 Received: by conslugarocko.mtv.corp.google.com (Postfix, from userid 115684) id EC4B123432E; Tue, 12 Jul 2011 15:42:07 -0700 (PDT) From: Todd Poynor To: Tony Lindgren Subject: [PATCH 4/4] ARM: OMAP2+: Check NULL return from irq_alloc_generic_chip Date: Tue, 12 Jul 2011 15:42:05 -0700 Message-Id: <1310510525-4786-1-git-send-email-toddpoynor@google.com> X-Mailer: git-send-email 1.7.3.1 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110712_184220_262059_822A24AB X-CRM114-Status: GOOD ( 11.49 ) X-Spam-Score: -1.7 (-) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-1.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.121.67 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.7 FRT_TODAY2 BODY: ReplaceTags: Today (2) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Todd Poynor , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 12 Jul 2011 22:43:00 +0000 (UTC) Signed-off-by: Todd Poynor --- arch/arm/mach-omap2/irq.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3af2b7a..acbb05c 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -129,6 +129,13 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) gc = irq_alloc_generic_chip("INTC", 1, irq_start, base, handle_level_irq); + + if (!gc) { + pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n", + __func__, irq_start); + return; + } + ct = gc->chip_types; ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg;