From patchwork Wed Jul 13 09:05:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tixy X-Patchwork-Id: 971032 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6D96mJ5025414 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 13 Jul 2011 09:07:09 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QgvP1-00049z-Bj; Wed, 13 Jul 2011 09:06:43 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QgvP1-00032g-0J; Wed, 13 Jul 2011 09:06:43 +0000 Received: from smarthost02.mail.zen.net.uk ([212.23.3.141]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QgvOe-0002wL-3F for linux-arm-kernel@lists.infradead.org; Wed, 13 Jul 2011 09:06:24 +0000 Received: from [82.69.122.217] (helo=plug1) by smarthost02.mail.zen.net.uk with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1QgvOc-0000Ml-7m for linux-arm-kernel@lists.infradead.org; Wed, 13 Jul 2011 09:06:18 +0000 Received: from [192.168.2.20] (helo=computer2) by plug1 with esmtp (Exim 4.72) (envelope-from ) id 1QgvOb-0000RF-9x for linux-arm-kernel@lists.infradead.org; Wed, 13 Jul 2011 10:06:17 +0100 Received: from tixy by computer2 with local (Exim 4.72) (envelope-from ) id 1QgvOb-0008HJ-NA for linux-arm-kernel@lists.infradead.org; Wed, 13 Jul 2011 10:06:17 +0100 From: Tixy To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/24] ARM: kprobes: Add alu_write_pc() Date: Wed, 13 Jul 2011 10:05:51 +0100 Message-Id: <1310547973-31784-3-git-send-email-tixy@yxit.co.uk> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1310547973-31784-1-git-send-email-tixy@yxit.co.uk> References: <1310547973-31784-1-git-send-email-tixy@yxit.co.uk> X-Originating-Smarthost02-IP: [82.69.122.217] X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110713_050620_386441_9BE99159 X-CRM114-Status: GOOD ( 18.34 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.23.3.141 listed in list.dnswl.org] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 13 Jul 2011 09:07:09 +0000 (UTC) From: Jon Medhurst This writes a new value to PC which was obtained as the result of an ARM ALU instruction. For ARMv7 and later this performs interworking. On ARM kernels we shouldn't encounter any ALU instructions trying to switch to Thumb mode so support for this isn't strictly necessary. However, the approach taken in all other instruction decoding is for us to avoid unpredictable modification of the PC for security reasons. This is usually achieved by rejecting insertion of probes on problematic instruction, but for ALU instructions we can't do this as it depends on the contents of the CPU registers at the time the probe is hit. So, as we require some form of run-time checking to trap undesirable PC modification, we may as well simulate the instructions correctly, i.e. in the way they would behave in the absence of a probe. Signed-off-by: Jon Medhurst --- arch/arm/kernel/kprobes.h | 28 ++++++++++++++++++++++++++++ arch/arm/kernel/kprobes-common.c | 15 +++++++++++++++ 2 files changed, 43 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/kprobes.h b/arch/arm/kernel/kprobes.h index c442852..a6aeda0 100644 --- a/arch/arm/kernel/kprobes.h +++ b/arch/arm/kernel/kprobes.h @@ -133,6 +133,34 @@ static inline void __kprobes load_write_pc(long pcv, struct pt_regs *regs) } +#if __LINUX_ARM_ARCH__ >= 7 + +#define alu_write_pc_interworks true +#define test_alu_write_pc_interworking() + +#elif __LINUX_ARM_ARCH__ <= 5 + +/* Kernels built for <= ARMv5 should never run on >= ARMv6 hardware, so... */ +#define alu_write_pc_interworks false +#define test_alu_write_pc_interworking() + +#else /* __LINUX_ARM_ARCH__ == 6 */ + +/* We could be an ARMv6 binary on ARMv7 hardware so we need a run-time check. */ +extern bool alu_write_pc_interworks; +void __init test_alu_write_pc_interworking(void); + +#endif /* __LINUX_ARM_ARCH__ == 6 */ + +static inline void __kprobes alu_write_pc(long pcv, struct pt_regs *regs) +{ + if (alu_write_pc_interworks) + bx_write_pc(pcv, regs); + else + regs->ARM_pc = pcv; +} + + void __kprobes kprobe_simulate_nop(struct kprobe *p, struct pt_regs *regs); void __kprobes kprobe_emulate_none(struct kprobe *p, struct pt_regs *regs); diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c index 32bb0f2..a5394fb4 100644 --- a/arch/arm/kernel/kprobes-common.c +++ b/arch/arm/kernel/kprobes-common.c @@ -59,10 +59,25 @@ void __init test_load_write_pc_interworking(void) #endif /* !test_load_write_pc_interworking */ +#ifndef test_alu_write_pc_interworking + +bool alu_write_pc_interworks; + +void __init test_alu_write_pc_interworking(void) +{ + int arch = cpu_architecture(); + BUG_ON(arch == CPU_ARCH_UNKNOWN); + alu_write_pc_interworks = arch >= CPU_ARCH_ARMv7; +} + +#endif /* !test_alu_write_pc_interworking */ + + void __init arm_kprobe_decode_init(void) { find_str_pc_offset(); test_load_write_pc_interworking(); + test_alu_write_pc_interworking(); }