From patchwork Thu Jul 28 20:18:11 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Brown X-Patchwork-Id: 1017722 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p6SKIqle027188 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 28 Jul 2011 20:19:12 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QmX2Z-0006ag-FQ; Thu, 28 Jul 2011 20:18:43 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QmX2Y-0008GX-Py; Thu, 28 Jul 2011 20:18:42 +0000 Received: from wolverine02.qualcomm.com ([199.106.114.251]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QmX2F-0008CO-7p for linux-arm-kernel@lists.infradead.org; Thu, 28 Jul 2011 20:18:24 +0000 X-IronPort-AV: E=McAfee;i="5400,1158,6421"; a="106412279" Received: from pdmz-ns-mip.qualcomm.com (HELO mostmsg01.qualcomm.com) ([199.106.114.10]) by wolverine02.qualcomm.com with ESMTP/TLS/ADH-AES256-SHA; 28 Jul 2011 13:18:21 -0700 Received: from codeaurora.org (pdmz-snip-v218.qualcomm.com [192.168.218.1]) by mostmsg01.qualcomm.com (Postfix) with ESMTPA id 226FF10004D1; Thu, 28 Jul 2011 13:18:21 -0700 (PDT) From: David Brown To: Russell King , David Brown , Daniel Walker , Bryan Huntsman Subject: [PATCH 2/2] ARM: msm: Remove PLAT_PHYS_OFFSETS from MSM targets Date: Thu, 28 Jul 2011 13:18:11 -0700 Message-Id: <1311884291-5409-2-git-send-email-davidb@codeaurora.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1311884291-5409-1-git-send-email-davidb@codeaurora.org> References: <1311794355-26988-2-git-send-email-sboyd@codeaurora.org> <1311884291-5409-1-git-send-email-davidb@codeaurora.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110728_161823_564528_12A51F7B X-CRM114-Status: GOOD ( 16.07 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [199.106.114.251 listed in list.dnswl.org] Cc: Nicolas Pitre , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 28 Jul 2011 20:19:12 +0000 (UTC) Now that MSM can boot with the phys offset patching, eliminate the definitions of the phys offsets, and instead select ARM_PATCH_PHYS_VIRT. Signed-off-by: David Brown diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ced9371..3a4d87c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -618,6 +618,7 @@ config ARCH_MSM select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select ARM_PATCH_PHYS_VIRT help Support for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h index 58d5e7e..deed41a 100644 --- a/arch/arm/mach-msm/include/mach/memory.h +++ b/arch/arm/mach-msm/include/mach/memory.h @@ -17,19 +17,12 @@ #define __ASM_ARCH_MEMORY_H /* physical offset of RAM */ -#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A) -#define PLAT_PHYS_OFFSET UL(0x00000000) -#elif defined(CONFIG_ARCH_QSD8X50) -#define PLAT_PHYS_OFFSET UL(0x20000000) -#elif defined(CONFIG_ARCH_MSM7X30) -#define PLAT_PHYS_OFFSET UL(0x00000000) -#elif defined(CONFIG_ARCH_MSM8X60) -#define PLAT_PHYS_OFFSET UL(0x40000000) -#elif defined(CONFIG_ARCH_MSM8960) -#define PLAT_PHYS_OFFSET UL(0x40000000) -#else -#define PLAT_PHYS_OFFSET UL(0x10000000) -#endif +#define QSD8X50A_PHYS_OFFSET UL(0x00000000) +#define QSD8X50_PHYS_OFFSET UL(0x20000000) +#define MSM7X30_PHYS_OFFSET UL(0x00000000) +#define MSM8X60_PHYS_OFFSET UL(0x10000000) +#define MSM8960_PHYS_OFFSET UL(0x40000000) +#define MSM7X01_PHYS_OFFSET UL(0x10000000) #endif