From patchwork Tue Aug 2 15:48:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1029602 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p72FmxYt001647 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 2 Aug 2011 15:49:20 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QoHD8-00089x-4e; Tue, 02 Aug 2011 15:48:50 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QoHD7-000672-K2; Tue, 02 Aug 2011 15:48:49 +0000 Received: from mail.df.lth.se ([194.47.250.12]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QoHD4-00066U-Lh for linux-arm-kernel@lists.infradead.org; Tue, 02 Aug 2011 15:48:47 +0000 Received: from localhost.localdomain (unknown [109.234.204.184]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPSA id 4BC8B65D65; Tue, 2 Aug 2011 17:48:42 +0200 (CEST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] mach-davinci: fix cache flush build error Date: Tue, 2 Aug 2011 17:48:38 +0200 Message-Id: <1312300118-9088-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.6 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110802_114846_872688_A839FE98 X-CRM114-Status: GOOD ( 14.08 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [194.47.250.12 listed in list.dnswl.org] Cc: Linus Walleij , Lee Jones , Dave Martin , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Tue, 02 Aug 2011 15:49:20 +0000 (UTC) From: Linus Walleij The TNET variant of DaVinci compiles some code that it shares with other DaVinci variants, however it has a V6 CPU rather than an ARM926T, thus the hardcoded call to arm926_flush_kern_cache_all() in sleep.S will obviously fail, and we need to build with the v6_flush_kern_cache_all() call instead. This was triggered by manually altering the DaVinci config to build the TNET version. Cc: Dave Martin Cc: Arnd Bergmann Signed-off-by: Linus Walleij --- This is just an ifdef to get the DaVinci TNET variant to compile, if there is a way to call out to some abstract flush function in a MULTI CPU/cache configuration from _assembler_ code, please tell me, I'm not all that happy about this since it blocks proper multiboard support for DaVinci, would be nice to find a better solution. --- arch/arm/mach-davinci/sleep.S | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S index fb5e72b..5f1e045 100644 --- a/arch/arm/mach-davinci/sleep.S +++ b/arch/arm/mach-davinci/sleep.S @@ -217,7 +217,11 @@ ddr2clk_stop_done: ENDPROC(davinci_ddr_psc_config) CACHE_FLUSH: - .word arm926_flush_kern_cache_all +#ifdef CONFIG_CPU_V6 + .word v6_flush_kern_cache_all +#else + .word arm926_flush_kern_cache_all +#endif ENTRY(davinci_cpu_suspend_sz) .word . - davinci_cpu_suspend