From patchwork Mon Aug 8 14:28:29 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tixy X-Patchwork-Id: 1045352 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p78EUXrm014031 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 8 Aug 2011 14:30:54 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QqQqP-0001Qn-DE; Mon, 08 Aug 2011 14:30:17 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqQqO-00084d-MM; Mon, 08 Aug 2011 14:30:16 +0000 Received: from smarthost01.mail.zen.net.uk ([212.23.3.140]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqQpg-0007uf-2v for linux-arm-kernel@lists.infradead.org; Mon, 08 Aug 2011 14:29:34 +0000 Received: from [82.69.122.217] (helo=plug1) by smarthost01.mail.zen.net.uk with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1QqQpb-00010f-N9; Mon, 08 Aug 2011 14:29:27 +0000 Received: from [192.168.2.20] (helo=computer2) by plug1 with esmtp (Exim 4.72) (envelope-from ) id 1QqQpa-0003wq-8o; Mon, 08 Aug 2011 15:29:26 +0100 Received: from tixy by computer2 with local (Exim 4.72) (envelope-from ) id 1QqQpa-0005wx-5k; Mon, 08 Aug 2011 15:29:26 +0100 From: Jon Medhurst To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/12] ARM: mach-at91: Setup consistent dma size at boot time Date: Mon, 8 Aug 2011 15:28:29 +0100 Message-Id: <1312813712-22808-10-git-send-email-tixy@yxit.co.uk> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1312813712-22808-1-git-send-email-tixy@yxit.co.uk> References: <1312813712-22808-1-git-send-email-tixy@yxit.co.uk> X-Originating-Smarthost01-IP: [82.69.122.217] X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110808_102932_423254_721B2E7A X-CRM114-Status: GOOD ( 15.35 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.23.3.140 listed in list.dnswl.org] Cc: Nicolas Ferre X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 08 Aug 2011 14:30:55 +0000 (UTC) Signed-off-by: Jon Medhurst CC: Nicolas Ferre Acked-by: Nicolas Ferre --- arch/arm/mach-at91/include/mach/at91sam9g45.h | 2 -- arch/arm/mach-at91/at91sam9g45.c | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 2c611b9..406bb64 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h @@ -128,8 +128,6 @@ #define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */ #define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */ -#define CONSISTENT_DMA_SIZE SZ_4M - /* * DMA peripheral identifiers * for hardware handshaking interface diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index e04c5fb..1532b50 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -12,6 +12,7 @@ #include #include +#include #include #include @@ -319,6 +320,7 @@ static void at91sam9g45_poweroff(void) static void __init at91sam9g45_map_io(void) { at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); + init_consistent_dma_size(SZ_4M); } static void __init at91sam9g45_initialize(void)