From patchwork Mon Aug 15 20:28:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 1069132 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7FKUGVi020764 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 15 Aug 2011 20:30:37 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qt3n7-0004dY-OV; Mon, 15 Aug 2011 20:29:48 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qt3n6-0000OJ-Sl; Mon, 15 Aug 2011 20:29:44 +0000 Received: from avon.wwwdotorg.org ([2001:470:1f0f:bd7::2]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qt3mD-0000BJ-RC for linux-arm-kernel@lists.infradead.org; Mon, 15 Aug 2011 20:28:51 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id D043D6257; Mon, 15 Aug 2011 14:30:00 -0600 (MDT) Received: from localhost.localdomain (searspoint.nvidia.com [216.228.112.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 7317CE4617; Mon, 15 Aug 2011 14:28:43 -0600 (MDT) From: Stephen Warren To: Grant Likely , Colin Cross , Erik Gilling , Olof Johansson Subject: [RFC PATCH v2 03/13] arm/tegra: board-dt: Add AUXDATA for tegra-gpio and tegra-pinmux Date: Mon, 15 Aug 2011 14:28:10 -0600 Message-Id: <1313440100-17131-4-git-send-email-swarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1313440100-17131-1-git-send-email-swarren@nvidia.com> References: <1313440100-17131-1-git-send-email-swarren@nvidia.com> X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110815_162850_094391_3A3AD9AD X-CRM114-Status: GOOD ( 13.66 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- Cc: Russell King , Sergei Shtylyov , Arnd Bergmann , Stephen Warren , Belisko Marek , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Shawn Guo , linux-tegra@vger.kernel.org, Jamie Iles , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Mon, 15 Aug 2011 20:30:37 +0000 (UTC) Add AUXDATA so that Tegra GPIO and pinmux devices that are instantiated from device-tree are named consistently with the static platform devices in mach-tegra/devices.c. Note that the device-tree file tegra20.dtsi already includes a node for the Tegra GPIO controller, whereas the node for the Tegra pinmux controller will be added in a subsequent commit. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c index 9f47e04..1995b79 100644 --- a/arch/arm/mach-tegra/board-dt.c +++ b/arch/arm/mach-tegra/board-dt.c @@ -50,6 +50,8 @@ void seaboard_pinmux_init(void); struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE, "tegra-pinmux", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),