From patchwork Thu Aug 25 23:43:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 1099562 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7PNjTSf005421 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 25 Aug 2011 23:45:50 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qwjbe-0002oK-Sx; Thu, 25 Aug 2011 23:45:07 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qwjbd-0002dV-Mc; Thu, 25 Aug 2011 23:45:05 +0000 Received: from avon.wwwdotorg.org ([2001:470:1f0f:bd7::2]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qwjab-0002QF-SO for linux-arm-kernel@lists.infradead.org; Thu, 25 Aug 2011 23:44:02 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id C377563FC; Thu, 25 Aug 2011 17:45:44 -0600 (MDT) Received: from localhost.localdomain (searspoint.nvidia.com [216.228.112.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 953BCE45FB; Thu, 25 Aug 2011 17:43:58 -0600 (MDT) From: Stephen Warren To: Grant Likely , Colin Cross , Erik Gilling , Olof Johansson Subject: [PATCH v3 03/13] arm/dt: Tegra: Add nvidia, enabled-gpios property to GPIO controller Date: Thu, 25 Aug 2011 17:43:34 -0600 Message-Id: <1314315824-9687-4-git-send-email-swarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1314315824-9687-1-git-send-email-swarren@nvidia.com> References: <1314315824-9687-1-git-send-email-swarren@nvidia.com> X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110825_194402_023810_53F7548F X-CRM114-Status: GOOD ( 12.56 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- Cc: Russell King , Sergei Shtylyov , Arnd Bergmann , Stephen Warren , Belisko Marek , devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Shawn Guo , linux-tegra@vger.kernel.org, Jamie Iles , Linus Walleij , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 25 Aug 2011 23:45:50 +0000 (UTC) Add board-specific gpio node for Harmony and Seaboard. This lists the GPIOs used by the board. Note that not all GPIOs that exist on the board are listed; only those used by devices currently supported by device tree. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra-harmony.dts | 15 +++++++++++++++ arch/arm/boot/dts/tegra-seaboard.dts | 8 ++++++++ 2 files changed, 23 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index e581866..2bbe559 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts @@ -15,6 +15,21 @@ reg = < 0x00000000 0x40000000 >; }; + gpio: gpio@6000d000 { + nvidia,enabled-gpios = < + 69 // TEGRA_GPIO_PI5 SD2_CD + 57 // TEGRA_GPIO_PH1 SD2_WP + 155 // TEGRA_GPIO_PT3 SD2_POWER + 58 // TEGRA_GPIO_PH2 SD4_CD + 59 // TEGRA_GPIO_PH3 SD4_WP + 70 // TEGRA_GPIO_PI6 SD4_POWER + 187 // TEGRA_GPIO_PX3 CDC_IRQ + 178 // TEGRA_GPIO_PW2 HP_DET + 184 // TEGRA_GPIO_PX0 INT_MIC_EN + 185 // TEGRA_GPIO_PX1 EXT_MIC_EN + >; + }; + i2c@7000c000 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index 64cedca..ec8f8cf 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts @@ -16,6 +16,14 @@ reg = < 0x00000000 0x40000000 >; }; + gpio: gpio@6000d000 { + nvidia,enabled-gpios = < + 69 // TEGRA_GPIO_PI5 SD2_CD + 57 // TEGRA_GPIO_PH1 SD2_WP + 70 // TEGRA_GPIO_PI6 SD2_POWER + >; + }; + serial@70006300 { clock-frequency = < 216000000 >; };