From patchwork Sat Aug 27 14:48:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Lei X-Patchwork-Id: 1103822 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7REnEq2003782 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 27 Aug 2011 14:49:35 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QxKBs-0006Gp-3d; Sat, 27 Aug 2011 14:48:56 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QxKBr-0004dV-Mh; Sat, 27 Aug 2011 14:48:55 +0000 Received: from mail-pz0-f41.google.com ([209.85.210.41]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QxKBo-0004dB-1N for linux-arm-kernel@lists.infradead.org; Sat, 27 Aug 2011 14:48:52 +0000 Received: by pzk4 with SMTP id 4so8767004pzk.28 for ; Sat, 27 Aug 2011 07:48:48 -0700 (PDT) Received: by 10.142.150.22 with SMTP id x22mr1287616wfd.23.1314456528112; Sat, 27 Aug 2011 07:48:48 -0700 (PDT) Received: from localhost ([183.37.202.102]) by mx.google.com with ESMTPS id q19sm333063wfn.18.2011.08.27.07.48.42 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 27 Aug 2011 07:48:47 -0700 (PDT) From: ming.lei@canonical.com To: greg@kroah.com, stern@rowland.harvard.edu Subject: [PATCH] usb: ehci: fix update qtd->token in qh_append_tds Date: Sat, 27 Aug 2011 22:48:35 +0800 Message-Id: <1314456515-16419-1-git-send-email-ming.lei@canonical.com> X-Mailer: git-send-email 1.7.4.1 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110827_104852_255274_3C4719F8 X-CRM114-Status: GOOD ( 10.86 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.41 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (tom.leiming[at]gmail.com) 0.0 T_TO_NO_BRKTS_FREEMAIL To: misformatted and free email service Cc: linux-omap@vger.kernel.org, linux-usb@vger.kernel.org, Ming Lei , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Sat, 27 Aug 2011 14:49:35 +0000 (UTC) From: Ming Lei This patch fixs one performance bug on ARM Cortex A9 dual core platform, which has been reported on quite a few ARM machines(OMAP4, Tegra 2, snowball...), see details from link of https://bugs.launchpad.net/bugs/709245. In fact, one mb() on ARM is enough to flush L2 cache, but 'dummy->hw_token = token;' after mb() is added just for obeying correct mb() usage. The patch has been tested ok on OMAP4 panda A1 board, the performance of 'dd' over usb mass storage can be increased from 4~5MB/sec to 14~16MB/sec after applying this patch. Signed-off-by: Ming Lei --- drivers/usb/host/ehci-q.c | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 0917e3a..65b5021 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -1082,6 +1082,20 @@ static struct ehci_qh *qh_append_tds ( wmb (); dummy->hw_token = token; + /* The mb() below is added to make sure that + * 'token' can be writen into qtd, so that ehci + * HC can see the up-to-date qtd descriptor. On + * some archs(at least on ARM Cortex A9 dual core), + * writing into coherenet memory doesn't mean the + * value written can reach physical memory + * immediately, and the value may be buffered + * inside L2 cache. 'dummy->hw_token = token;' + * after mb() is added for obeying correct mb() + * usage. + * */ + mb(); + token = dummy->hw_token; + urb->hcpriv = qh_get (qh); } }