From patchwork Wed Aug 31 21:26:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Salter X-Patchwork-Id: 1117752 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7VLX7Mg023875 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 31 Aug 2011 21:33:27 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QysOS-00009P-31; Wed, 31 Aug 2011 21:32:21 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QysOR-0008T0-6F; Wed, 31 Aug 2011 21:32:19 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QysKK-0007ba-Im for linux-arm-kernel@lists.infradead.org; Wed, 31 Aug 2011 21:28:27 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p7VLS2RS023133 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 31 Aug 2011 17:28:02 -0400 Received: from deneb.redhat.com (ovpn-113-34.phx2.redhat.com [10.3.113.34]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p7VLRlt1026590; Wed, 31 Aug 2011 17:28:01 -0400 From: Mark Salter To: linux-kernel@vger.kernel.org Subject: [PATCH 22/24] C6X: EMIF - External Memory Interface Date: Wed, 31 Aug 2011 17:26:57 -0400 Message-Id: <1314826019-22330-23-git-send-email-msalter@redhat.com> In-Reply-To: <1314826019-22330-1-git-send-email-msalter@redhat.com> References: <1314826019-22330-1-git-send-email-msalter@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110831_172805_109320_4AF9211B X-CRM114-Status: GOOD ( 17.60 ) X-Spam-Score: -5.5 (-----) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-5.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [209.132.183.28 listed in list.dnswl.org] -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: ming.lei@canonical.com, stern@rowland.harvard.edu, linux-arm-kernel@lists.infradead.org, Mark Salter X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 31 Aug 2011 21:33:27 +0000 (UTC) Several SoC parts provide a simple bridge to support external memory mapped devices. This code probes the device tree for an EMIF node and sets up the bridge registers if such a node is found. Beyond initial set up, there is no further need to access the bridge control registers. External devices on the bus are accessed through their MMIO registers using suitable drivers. The bridge hardware does provide for timeout and other error interrupts, but these are not yet supported. Signed-off-by: Mark Salter --- arch/c6x/platforms/emif.c | 77 +++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 77 insertions(+), 0 deletions(-) create mode 100644 arch/c6x/platforms/emif.c diff --git a/arch/c6x/platforms/emif.c b/arch/c6x/platforms/emif.c new file mode 100644 index 0000000..2d9a35d --- /dev/null +++ b/arch/c6x/platforms/emif.c @@ -0,0 +1,77 @@ +/* + * External Memory Interface + * + * Copyright (C) 2011 Texas Instruments Incorporated + * Author: Mark Salter + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include + +#define NUM_EMIFA_CHIP_ENABLES 4 + +struct emifa_regs { + u32 midr; + u32 stat; + u32 reserved1[6]; + u32 bprio; + u32 reserved2[23]; + u32 ce_config; + u32 cecfg[NUM_EMIFA_CHIP_ENABLES]; + u32 reserved3[4]; + u32 awcc; + u32 reserved4[7]; + u32 intraw; + u32 intmsk; + u32 intmskset; + u32 intmskclr; +}; + +/* + * Parse device tree for existence of an EMIF (External Memory Interface) + * and initialize it if found. + */ +static int __init c6x_emifa_init(void) +{ + struct emifa_regs __iomem *regs; + struct device_node *node; + const __be32 *p; + int i, len; + + node = of_find_compatible_node(NULL, NULL, "ti,c64x+emifa"); + if (!node) + return 0; + + regs = of_iomap(node, 0); + if (!regs) + return 0; + + /* emif power/clocks */ + soc_dev_enable(SOC_DEV_EMIF, 0); + + p = of_get_property(node, "ti,emifa-ce-config", &len); + if (p) { + len /= sizeof(u32); + if (len > NUM_EMIFA_CHIP_ENABLES) + len = NUM_EMIFA_CHIP_ENABLES; + for (i = 0; i <= len; i++) + soc_writel(be32_to_cpup(&p[i]), ®s->cecfg[i]); + } + + p = of_get_property(node, "ti,emifa-burst-priority", &len); + if (p && len == sizeof(u32)) + soc_writel(be32_to_cpup(p), ®s->bprio); + + p = of_get_property(node, "ti,emifa-async-wait-control", &len); + if (p && len == sizeof(u32)) + soc_writel(be32_to_cpup(p), ®s->awcc); + + of_node_put(node); + return 0; +} +pure_initcall(c6x_emifa_init);