From patchwork Thu Sep 1 17:21:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Cousson X-Patchwork-Id: 1119972 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p81HQGxX031851 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 1 Sep 2011 17:26:36 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QzB0j-0002fs-NJ; Thu, 01 Sep 2011 17:25:06 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QzB0i-0007mP-Fk; Thu, 01 Sep 2011 17:25:04 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QzAyN-00074Y-Km for linux-arm-kernel@lists.infradead.org; Thu, 01 Sep 2011 17:22:42 +0000 Received: from dlep34.itg.ti.com ([157.170.170.115]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p81HMcbF016509 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 1 Sep 2011 12:22:38 -0500 Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) by dlep34.itg.ti.com (8.13.7/8.13.8) with ESMTP id p81HMcmX016652; Thu, 1 Sep 2011 12:22:38 -0500 (CDT) Received: from DFLE70.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p81HMcN5018063; Thu, 1 Sep 2011 12:22:38 -0500 (CDT) Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle70.ent.ti.com (128.247.5.40) with Microsoft SMTP Server id 14.1.323.3; Thu, 1 Sep 2011 12:22:37 -0500 Received: from localhost.localdomain (lncpu04.tif.ti.com [137.167.102.15]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id p81HLa58016431; Thu, 1 Sep 2011 12:22:36 -0500 From: Benoit Cousson To: , Subject: [PATCH 10/13] arm/dts: omap4-panda: Add twl6030 node Date: Thu, 1 Sep 2011 19:21:26 +0200 Message-ID: <1314897689-17791-11-git-send-email-b-cousson@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1314897689-17791-1-git-send-email-b-cousson@ti.com> References: <1314897689-17791-1-git-send-email-b-cousson@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110901_132239_904805_33622B4D X-CRM114-Status: GOOD ( 14.02 ) X-Spam-Score: -2.8 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [198.47.26.152 listed in list.dnswl.org] -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: manjugk@ti.com, devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Benoit Cousson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 01 Sep 2011 17:26:36 +0000 (UTC) Add the twl6030 node in i2c1 controller. This is just the minimal support needed to boot OMAP4 boards without any crash. The support for all the features included in this MFD will be added later. Signed-off-by: Benoit Cousson Cc: Grant Likely --- arch/arm/boot/dts/omap4-panda.dts | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index 63ecf34..5c1c2a7 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -30,6 +30,29 @@ &i2c1 { clock-frequency = <400000>; + + /* + * Integrated Power Management Chip + * http://www.ti.com/lit/ds/symlink/twl6030.pdf + */ + twl@48 { + compatible = "ti,twl6030"; + reg = <0x48>; + interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */ + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + /* twl is a MFD, so it will contain a bunch of sub-ips */ + #address-cells = <1>; + #size-cells = <0>; + ranges = <0 0x48>; + + twl_rtc { + compatible = "ti,twl_rtc"; + interrupts = <11>; + reg = <0>; + }; + }; }; &i2c2 {