From patchwork Tue Jul 10 18:54:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Shiyan X-Patchwork-Id: 1178741 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 18CE8402D2 for ; Tue, 10 Jul 2012 18:59:26 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sofbp-0000MB-Gp; Tue, 10 Jul 2012 18:56:29 +0000 Received: from smtp23.mail.ru ([94.100.176.176]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SofaA-0000JC-WF for linux-arm-kernel@lists.infradead.org; Tue, 10 Jul 2012 18:55:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=Eyg5icybJSzWBzT+IWwZkSn8VriYASXCoW2j6K1WP7M=; b=KJnjW91cfOsRwZnSs1Xm0aYHO9Euq5JrpGkyVj9yozG9+hjo4ZVa//p24hb3jmJenYKVGKFHUwzaP9TYK9wR7n/MB4nNG7vVqYTBUckDmCO+bYVHcrXUCvwwbCl2eUpj; Received: from [188.134.41.72] (port=46719 helo=localhost.localdomain) by smtp23.mail.ru with esmtpa (envelope-from ) id 1Sofa6-0008Q4-1X; Tue, 10 Jul 2012 22:54:42 +0400 From: Alexander Shiyan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] ARM: i.MX5x clocks: Add EPIT support Date: Tue, 10 Jul 2012 22:54:27 +0400 Message-Id: <1341946469-25984-1-git-send-email-shc_work@mail.ru> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <20120709082700.GM24458@pengutronix.de> References: <20120709082700.GM24458@pengutronix.de> X-Spam: Not detected X-Mras: Ok X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shc_work[at]mail.ru) -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [94.100.176.176 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Sascha Hauer , Alexander Shiyan X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds support for Enhanced Periodic Interrupt Timer (EPIT) to clock subsystem. Signed-off-by: Alexander Shiyan --- arch/arm/mach-imx/clk-imx51-imx53.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a2200c7..d9cb79f 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -81,6 +81,7 @@ enum imx5_clks { ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred, ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate, ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate, + epit1_ipg_gate, epit1_per_gate, epit2_ipg_gate, epit2_per_gate, clk_max }; @@ -226,6 +227,10 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26); clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28); clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30); + clk[epit1_ipg_gate] = imx_clk_gate2("epit1_ipg_gate", "ipg", MXC_CCM_CCGR2, 2); + clk[epit1_per_gate] = imx_clk_gate2("epit1_per_gate", "per_root", MXC_CCM_CCGR2, 4); + clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6); + clk[epit2_per_gate] = imx_clk_gate2("epit2_per_gate", "per_root", MXC_CCM_CCGR2, 8); for (i = 0; i < ARRAY_SIZE(clk); i++) if (IS_ERR(clk[i])) @@ -279,6 +284,10 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[dummy], NULL, "imx-keypad"); clk_register_clkdev(clk[tve_gate], NULL, "imx-tve.0"); clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx-tve.0"); + clk_register_clkdev(clk[epit1_ipg_gate], "ipg", "imx-epit.0"); + clk_register_clkdev(clk[epit1_per_gate], "per", "imx-epit.0"); + clk_register_clkdev(clk[epit2_ipg_gate], "ipg", "imx-epit.1"); + clk_register_clkdev(clk[epit2_per_gate], "per", "imx-epit.1"); /* Set SDHC parents to be PLL2 */ clk_set_parent(clk[esdhc_a_sel], clk[pll2_sw]);