From patchwork Thu Jul 26 19:16:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Mack X-Patchwork-Id: 1244341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 1CF34DFFCE for ; Thu, 26 Jul 2012 19:25:11 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SuTb9-0007N1-61; Thu, 26 Jul 2012 19:19:47 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SuTYj-0007Fg-2k for linux-arm-kernel@merlin.infradead.org; Thu, 26 Jul 2012 19:17:18 +0000 Received: from svenfoo.org ([82.94.215.22] helo=mail.zonque.de) by casper.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SuTYL-0003NL-VR for linux-arm-kernel@lists.infradead.org; Thu, 26 Jul 2012 19:16:54 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.zonque.de (Postfix) with ESMTP id B4FE3C02A0; Thu, 26 Jul 2012 21:16:37 +0200 (CEST) Received: from mail.zonque.de ([127.0.0.1]) by localhost (rambrand.bugwerft.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tb11HInN7kCR; Thu, 26 Jul 2012 21:16:37 +0200 (CEST) Received: from tamtam.coova.org (unknown [62.4.132.80]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.zonque.de (Postfix) with ESMTPSA id 3EFFAC0081; Thu, 26 Jul 2012 21:16:37 +0200 (CEST) From: Daniel Mack To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 7/7] ARM: pxa: add .dtsi files Date: Thu, 26 Jul 2012 21:16:27 +0200 Message-Id: <1343330187-20049-8-git-send-email-zonque@gmail.com> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1343330187-20049-1-git-send-email-zonque@gmail.com> References: <1343330187-20049-1-git-send-email-zonque@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20120726_201654_110465_02144E3D X-CRM114-Status: GOOD ( 12.79 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.3.2 on casper.infradead.org summary: Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (zonque[at]gmail.com) 0.0 DKIM_ADSP_CUSTOM_MED No valid author signature, adsp_override is CUSTOM_MED 0.8 SPF_NEUTRAL SPF: sender does not match SPF record (neutral) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.9 NML_ADSP_CUSTOM_MED ADSP custom_med hit, and not from a mailing list Cc: eric.y.miao@gmail.com, linus.walleij@stericsson.com, arnd@arndb.de, haojian.zhuang@gmail.com, Daniel Mack , grant.likely@secretlab.ca, marek.vasut@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds .dtsi files to describe the PXA SoCs. pxa3xx simply augments pxa2xx. Not all devices are listed yet, and it will need some time to get all the drivers ported. Signed-off-by: Daniel Mack --- arch/arm/boot/dts/pxa2xx.dtsi | 132 ++++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/pxa3xx.dtsi | 27 +++++++++ 2 files changed, 159 insertions(+) create mode 100644 arch/arm/boot/dts/pxa2xx.dtsi create mode 100644 arch/arm/boot/dts/pxa3xx.dtsi diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi new file mode 100644 index 0000000..4fe3b91 --- /dev/null +++ b/arch/arm/boot/dts/pxa2xx.dtsi @@ -0,0 +1,132 @@ +/* + * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC + * + * Copyright (C) 2011 Marek Vasut + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + model = "Marvell PXA2xx family SoC"; + compatible = "marvell,pxa2xx"; + interrupt-parent = <&pxairq>; + + aliases { + serial0 = &ffuart; + serial1 = &btuart; + serial2 = &stuart; + serial3 = &hwuart; + i2c0 = &pwri2c; + i2c1 = &pxai2c1; + }; + + cpus { + cpu@0 { + compatible = "arm,xscale"; + }; + }; + + pxabus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pxairq: interrupt-controller@40d00000 { + #interrupt-cells = <1>; + compatible = "marvell,pxa-intc"; + interrupt-controller; + interrupt-parent; + mrvl,intc-nr-irqs = <56>; + reg = <0x40d00000 0xd0>; + }; + + gpio: gpio@40e00000 { + compatible = "mrvl,pxa-gpio"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x40e00000 0x10000>; + gpio-controller; + #gpio-cells = <0x2>; + interrupts = <10>; + interrupt-names = "gpio_mux"; + interrupt-controller; + #interrupt-cells = <0x2>; + ranges; + + gcb0: gpio@40e00000 { + reg = <0x40e00000 0x4>; + }; + + gcb1: gpio@40e00004 { + reg = <0x40e00004 0x4>; + }; + + gcb2: gpio@40e00008 { + reg = <0x40e00008 0x4>; + }; + gcb3: gpio@40e0000c { + reg = <0x40e0000c 0x4>; + }; + }; + + ffuart: uart@40100000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40100000 0x30>; + interrupts = <22>; + status = "disabled"; + }; + + btuart: uart@40200000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40200000 0x30>; + interrupts = <21>; + status = "disabled"; + }; + + stuart: uart@40700000 { + compatible = "mrvl,pxa-uart"; + reg = <0x40700000 0x30>; + interrupts = <20>; + status = "disabled"; + }; + + hwuart: uart@41100000 { + compatible = "mrvl,pxa-uart"; + reg = <0x41100000 0x30>; + interrupts = <7>; + status = "disabled"; + }; + + pxai2c1: i2c@40301680 { + compatible = "mrvl,pxa-i2c"; + reg = <0x40301680 0x30>; + interrupts = <18>; + #address-cells = <0x1>; + #size-cells = <0>; + status = "disabled"; + }; + + usb0: ohci@4c000000 { + compatible = "mrvl,pxa-ohci"; + reg = <0x4c000000 0x10000>; + interrupts = <3>; + status = "disabled"; + }; + + mmc0: mmc@41100000 { + compatible = "mrvl,pxa-mmc"; + reg = <0x41100000 0x1000>; + interrupts = <23>; + status = "disabled"; + }; + + rtc@40900000 { + compatible = "marvell,pxa-rtc"; + reg = <0x40900000 0x3c>; + interrupts = <30 31>; + }; + }; +}; diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi new file mode 100644 index 0000000..41e0a42 --- /dev/null +++ b/arch/arm/boot/dts/pxa3xx.dtsi @@ -0,0 +1,27 @@ +/* The pxa3xx skeleton simply augments the 2xx version */ +/include/ "pxa2xx.dtsi" + +/ { + model = "Marvell PXA3xx familiy SoC"; + compatible = "marvell,pxa3xx"; + + pxabus { + pwri2c: i2c@40f500c0 { + compatible = "mrvl,pwri2c"; + reg = <0x40f500c0 0x30>; + interrupts = <6>; + #address-cells = <0x1>; + #size-cells = <0>; + status = "disabled"; + }; + + nand0: nand@43100000 { + compatible = "marvell,pxa3xx-nand"; + reg = <0x43100000 90>; + interrupts = <45>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + }; +};