From patchwork Thu Jul 26 19:55:06 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1244711 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 145FA3FDCA for ; Thu, 26 Jul 2012 20:08:14 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SuUG7-0004bp-11; Thu, 26 Jul 2012 20:02:07 +0000 Received: from moutng.kundenserver.de ([212.227.17.8]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SuU9l-00043K-42 for linux-arm-kernel@lists.infradead.org; Thu, 26 Jul 2012 19:55:33 +0000 Received: from mailbox.adnet.avionic-design.de (mailbox.avionic-design.de [109.75.18.3]) by mrelayeu.kundenserver.de (node=mreu4) with ESMTP (Nemesis) id 0MAo9v-1T5jkj2MBv-00Bsmi; Thu, 26 Jul 2012 21:55:19 +0200 Received: from localhost (localhost [127.0.0.1]) by mailbox.adnet.avionic-design.de (Postfix) with ESMTP id E00592A28305; Thu, 26 Jul 2012 21:55:17 +0200 (CEST) X-Virus-Scanned: amavisd-new at avionic-design.de Received: from mailbox.adnet.avionic-design.de ([127.0.0.1]) by localhost (mailbox.avionic-design.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Sv9ycn-JofV4; Thu, 26 Jul 2012 21:55:15 +0200 (CEST) Received: from localhost (avionic-0098.adnet.avionic-design.de [172.20.31.233]) (Authenticated sender: thierry.reding) by mailbox.adnet.avionic-design.de (Postfix) with ESMTPA id C826B2A28161; Thu, 26 Jul 2012 21:55:15 +0200 (CEST) From: Thierry Reding To: linux-tegra@vger.kernel.org Subject: [PATCH v3 04/10] ARM: tegra: Move tegra_pcie_xclk_clamp() to PMC Date: Thu, 26 Jul 2012 21:55:06 +0200 Message-Id: <1343332512-28762-5-git-send-email-thierry.reding@avionic-design.de> X-Mailer: git-send-email 1.7.11.2 In-Reply-To: <1343332512-28762-1-git-send-email-thierry.reding@avionic-design.de> References: <1343332512-28762-1-git-send-email-thierry.reding@avionic-design.de> X-Provags-ID: V02:K0:nn7Cyy4YFdEtFUWh1XpVIxRaqYd/akvaePleQo/Q/Ki pagFZIxufOKVTLCIne+OTsBQUEWJrIJtm+yLv+X7OLS0KTGSiK i64rubedbr3IKPX0bs6SRyRgBDgjheiGyI/nGPAVN8Mgykq9wv FHQwkZAPgCflPJJz94lYMC9rtLYzqDmXVKnE8PYlCi/lGjEs4U lNC1SNVTtbyxZFWmxHXCLEaUMVr9LWG5yKQVzEuhL1F3X+8iL/ /zeYQsegMX5lOpU0Cz6J6ySYm53cWw3RCVfJKMjpNESaxoy7Jd dRNmrUlbF+jYi9qzVr10SaeDqlNAVWW58t/DPGXAeyw/8qtsqG Q1R/zZlHld6Ev31onv4/JbYOewZXVQtNTElGQ6Lrq9jaoDim93 vL/EZw+u/cq4mMn7Q4lykk4YvlOVQIYrE7pLxGe3NieMqKc+k4 12CMO X-Spam-Note: CRM114 invocation failed X-Spam-Note: SpamAssassin invocation failed Cc: Mitch Bradley , Russell King , Arnd Bergmann , Stephen Warren , linux-pci@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, Rob Herring , Grant Likely , Olof Johansson , Colin Cross , Bjorn Helgaas , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The PMC code already accesses to PMC registers so it makes sense to move this function there as well. While at it, rename the function to tegra_pmc_pcie_xclk_clamp() for consistency. Signed-off-by: Thierry Reding Acked-by: Stephen Warren --- Changes in v3: - none Changes in v2: - none arch/arm/mach-tegra/pcie.c | 30 ++++-------------------------- arch/arm/mach-tegra/pmc.c | 16 ++++++++++++++++ arch/arm/mach-tegra/pmc.h | 1 + 3 files changed, 21 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 576347a..efe71dd 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -42,6 +42,7 @@ #include #include "board.h" +#include "pmc.h" /* register definitions */ #define AFI_OFFSET 0x3800 @@ -145,17 +146,6 @@ #define PADS_PLL_CTL_TXCLKREF_DIV10 (0 << 20) #define PADS_PLL_CTL_TXCLKREF_DIV5 (1 << 20) -/* PMC access is required for PCIE xclk (un)clamping */ -#define PMC_SCRATCH42 0x144 -#define PMC_SCRATCH42_PCX_CLAMP (1 << 0) - -static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); - -#define pmc_writel(value, reg) \ - __raw_writel(value, reg_pmc_base + (reg)) -#define pmc_readl(reg) \ - __raw_readl(reg_pmc_base + (reg)) - /* * Tegra2 defines 1GB in the AXI address map for PCIe. * @@ -647,18 +637,6 @@ static int tegra_pcie_enable_controller(void) return 0; } -static void tegra_pcie_xclk_clamp(bool clamp) -{ - u32 reg; - - reg = pmc_readl(PMC_SCRATCH42) & ~PMC_SCRATCH42_PCX_CLAMP; - - if (clamp) - reg |= PMC_SCRATCH42_PCX_CLAMP; - - pmc_writel(reg, PMC_SCRATCH42); -} - static void tegra_pcie_power_off(void) { tegra_periph_reset_assert(tegra_pcie.pcie_xclk); @@ -666,7 +644,7 @@ static void tegra_pcie_power_off(void) tegra_periph_reset_assert(tegra_pcie.pex_clk); tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); - tegra_pcie_xclk_clamp(true); + tegra_pmc_pcie_xclk_clamp(true); } static int tegra_pcie_power_regate(void) @@ -675,7 +653,7 @@ static int tegra_pcie_power_regate(void) tegra_pcie_power_off(); - tegra_pcie_xclk_clamp(true); + tegra_pmc_pcie_xclk_clamp(true); tegra_periph_reset_assert(tegra_pcie.pcie_xclk); tegra_periph_reset_assert(tegra_pcie.afi_clk); @@ -689,7 +667,7 @@ static int tegra_pcie_power_regate(void) tegra_periph_reset_deassert(tegra_pcie.afi_clk); - tegra_pcie_xclk_clamp(false); + tegra_pmc_pcie_xclk_clamp(false); clk_prepare_enable(tegra_pcie.afi_clk); clk_prepare_enable(tegra_pcie.pex_clk); diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index 7af6a54..399dc3a 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -24,6 +24,10 @@ #define PMC_CTRL 0x0 #define PMC_CTRL_INTR_LOW (1 << 17) +/* PMC access is required for PCIE xclk (un)clamping */ +#define PMC_SCRATCH42 0x144 +#define PMC_SCRATCH42_PCX_CLAMP (1 << 0) + static inline u32 tegra_pmc_readl(u32 reg) { return readl(IO_ADDRESS(TEGRA_PMC_BASE + reg)); @@ -74,3 +78,15 @@ void __init tegra_pmc_init(void) val &= ~PMC_CTRL_INTR_LOW; tegra_pmc_writel(val, PMC_CTRL); } + +void tegra_pmc_pcie_xclk_clamp(bool clamp) +{ + u32 reg; + + reg = tegra_pmc_readl(PMC_SCRATCH42) & ~PMC_SCRATCH42_PCX_CLAMP; + + if (clamp) + reg |= PMC_SCRATCH42_PCX_CLAMP; + + tegra_pmc_writel(reg, PMC_SCRATCH42); +} diff --git a/arch/arm/mach-tegra/pmc.h b/arch/arm/mach-tegra/pmc.h index 8995ee4..2631c9a 100644 --- a/arch/arm/mach-tegra/pmc.h +++ b/arch/arm/mach-tegra/pmc.h @@ -19,5 +19,6 @@ #define __MACH_TEGRA_PMC_H void tegra_pmc_init(void); +void tegra_pmc_pcie_xclk_clamp(bool clamp); #endif