From patchwork Fri Jul 27 08:08:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 1247321 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 6DAD5DFFBF for ; Fri, 27 Jul 2012 08:15:28 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SufeD-0005xi-7V; Fri, 27 Jul 2012 08:11:45 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sufbk-0005aK-2m for linux-arm-kernel@lists.infradead.org; Fri, 27 Jul 2012 08:09:12 +0000 Received: from epcpsbgm2.samsung.com (mailout3.samsung.com [203.254.224.33]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M7T00BV37YBRVO0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 27 Jul 2012 17:08:50 +0900 (KST) X-AuditID: cbfee61b-b7f566d000005c8a-2c-50124c928b41 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id B8.B1.23690.29C42105; Fri, 27 Jul 2012 17:08:50 +0900 (KST) Received: from localhost.localdomain ([10.90.51.45]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M7T007T07Y88OC0@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 27 Jul 2012 17:08:50 +0900 (KST) From: Chanho Park To: kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCHv2 3/3] ARM: EXYNOS: Enable PMUs for exynos4/5 Date: Fri, 27 Jul 2012 17:08:29 +0900 Message-id: <1343376509-5881-4-git-send-email-chanho61.park@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1343376509-5881-1-git-send-email-chanho61.park@samsung.com> References: <1343376509-5881-1-git-send-email-chanho61.park@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLJMWRmVeSWpSXmKPExsVy+t9jQd1JPkIBBq/uSFtsenyN1YHRY/OS +gDGKC6blNSczLLUIn27BK6MzVvushYs06g4vk+ugfGwUhcjJ4eEgInEh5ajTBC2mMSFe+vZ uhi5OIQEpjNK/L7/kQUkISSwlkli0REDEJtNQFdiy/NXjCC2iECKxJUb/WA2s8ACRon9X0JA bGEBW4mnX5qYuxg5OFgEVCUOXlYBMXkFPCQOPckAMSUEFCTmTLIBKeYU8JQ4tP8FG8QiD4nJ x6cwT2DkXcDIsIpRNLUguaA4KT3XSK84Mbe4NC9dLzk/dxMj2NPPpHcwrmqwOMQowMGoxMM7 Q0QoQIg1say4MvcQowQHs5II71dboBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXFeE++v/kIC6Ykl qdmpqQWpRTBZJg5OqQZG9iom9bT7VlNfr4ucz9qxv6e358KN5a4RnHm5oiYh+cqmEvteeH+7 pxBjrfzpf1Go3a5NKw2nbd0Re+Rj0cRcPyb2Yzvb/3hIG+hfPLTHh/dXtOnbztj3e6+lTzj/ oL1kkXJccl0Lg6mF7tEmWwOridfr9qh78ph8kLIs5Wu3+6N/5exfxW1KLMUZiYZazEXFiQDz bGz88AEAAA== X-TM-AS-MML: No X-Spam-Note: CRM114 invocation failed X-Spam-Note: SpamAssassin invocation failed Cc: sachin.kamat@linaro.org, will.deacon@arm.com, Chanho Park , linux@arm.linux.org.uk, Kyungmin Park X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch define irq numbers of ARM performance monitoring unit for exynos4/5. The number of CPU cores and PMU irq numbers are vary according to soc types. So we need to identify each soc type using soc_is_xxx function and define the pmu irqs dynamically. In case of exynos4412, there are 4 cpu cores and pmus. Signed-off-by: Chanho Park Signed-off-by: Kyungmin Park --- arch/arm/mach-exynos/common.c | 65 ++++++++++++++++++++++++++++++ arch/arm/mach-exynos/include/mach/irqs.h | 8 +++- arch/arm/plat-samsung/devs.c | 3 +- 3 files changed, 73 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 499791a..4271df0 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -30,11 +30,13 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -1065,3 +1067,66 @@ static int __init exynos_init_irq_eint(void) return 0; } arch_initcall(exynos_init_irq_eint); + +#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) +static struct resource exynos42xx_pmu_resource[] = { + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU), + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1), +}; + +static struct platform_device exynos42xx_device_pmu = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .num_resources = ARRAY_SIZE(exynos42xx_pmu_resource), + .resource = exynos42xx_pmu_resource, +}; +#endif + +#if defined(CONFIG_SOC_EXYNOS4412) +static struct resource exynos44xx_pmu_resource[] = { + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU), + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1), + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2), + DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3), +}; + +static struct platform_device exynos44xx_device_pmu = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .num_resources = ARRAY_SIZE(exynos44xx_pmu_resource), + .resource = exynos44xx_pmu_resource, +}; +#endif + +#if defined(CONFIG_SOC_EXYNOS5250) +static struct resource exynos52xx_pmu_resource[] = { + DEFINE_RES_IRQ(EXYNOS5_IRQ_PMU), + DEFINE_RES_IRQ(EXYNOS5_IRQ_PMU_CPU1), +}; + +static struct platform_device exynos52xx_device_pmu = { + .name = "arm-pmu", + .id = ARM_PMU_DEVICE_CPU, + .num_resources = ARRAY_SIZE(exynos52xx_pmu_resource), + .resource = exynos52xx_pmu_resource, +}; +#endif + +static int __init exynos_armpmu_init(void) +{ +#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) + if (soc_is_exynos4210() || soc_is_exynos4212()) + platform_device_register(&exynos42xx_device_pmu); +#endif +#if defined(CONFIG_SOC_EXYNOS4412) + if (soc_is_exynos4412()) + platform_device_register(&exynos44xx_device_pmu); +#endif +#if defined(CONFIG_SOC_EXYNOS5250) + if (soc_is_exynos5250()) + platform_device_register(&exynos52xx_device_pmu); +#endif + + return 0; +} +arch_initcall(exynos_armpmu_init); diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 12b4f48..f4e9257 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -128,7 +128,7 @@ #define EXYNOS4_IRQ_ADC1 IRQ_SPI(107) #define EXYNOS4_IRQ_PEN1 IRQ_SPI(108) #define EXYNOS4_IRQ_KEYPAD IRQ_SPI(109) -#define EXYNOS4_IRQ_PMU IRQ_SPI(110) +#define EXYNOS4_IRQ_POWER_PMU IRQ_SPI(110) #define EXYNOS4_IRQ_GPS IRQ_SPI(111) #define EXYNOS4_IRQ_INTFEEDCTRL_SSS IRQ_SPI(112) #define EXYNOS4_IRQ_SLIMBUS IRQ_SPI(113) @@ -136,6 +136,11 @@ #define EXYNOS4_IRQ_TSI IRQ_SPI(115) #define EXYNOS4_IRQ_SATA IRQ_SPI(116) +#define EXYNOS4_IRQ_PMU COMBINER_IRQ(2, 2) +#define EXYNOS4_IRQ_PMU_CPU1 COMBINER_IRQ(3, 2) +#define EXYNOS4_IRQ_PMU_CPU2 COMBINER_IRQ(18, 2) +#define EXYNOS4_IRQ_PMU_CPU3 COMBINER_IRQ(19, 2) + #define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) #define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) #define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) @@ -231,7 +236,6 @@ #define IRQ_TC EXYNOS4_IRQ_PEN0 #define IRQ_KEYPAD EXYNOS4_IRQ_KEYPAD -#define IRQ_PMU EXYNOS4_IRQ_PMU #define IRQ_FIMD0_FIFO EXYNOS4_IRQ_FIMD0_FIFO #define IRQ_FIMD0_VSYNC EXYNOS4_IRQ_FIMD0_VSYNC diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 74e31ce..31bb023 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -1098,7 +1098,7 @@ struct platform_device s5p_device_onenand = { /* PMU */ -#ifdef CONFIG_PLAT_S5P +#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS) static struct resource s5p_pmu_resource[] = { DEFINE_RES_IRQ(IRQ_PMU) }; @@ -1113,6 +1113,7 @@ static struct platform_device s5p_device_pmu = { static int __init s5p_pmu_init(void) { platform_device_register(&s5p_device_pmu); + return 0; } arch_initcall(s5p_pmu_init);