From patchwork Tue Aug 7 18:49:56 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dongjin Kim X-Patchwork-Id: 1287661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 80CF43FCC5 for ; Tue, 7 Aug 2012 18:55:17 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Syot2-0005dz-DR; Tue, 07 Aug 2012 18:52:12 +0000 Received: from mail-yx0-f177.google.com ([209.85.213.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Syosx-0005ct-Hx for linux-arm-kernel@lists.infradead.org; Tue, 07 Aug 2012 18:52:09 +0000 Received: by yenr9 with SMTP id r9so4378096yen.36 for ; Tue, 07 Aug 2012 11:52:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=TknHSgfNCmPoVJE+MbA/TXfjgJrVVc3dggEKkDfsvpk=; b=iD3e+S9CSaSRwvdNal0O2VBuPwyeYNs1L7AfXRbHFn8eo6UWzt+4e5XA9+YxglINRT mGF/lZQRliG4ftNs+0v2G6KtyHFLexUvmcsgDcYcyy2S9/BqmChna0hT8yxKhUaAeI8a uwwHX3runPKwOTJgQj8J1lisUM5Dw/W86kc+WW3A/Hs8L29wRqLxUseda3EzzI/Fr2Lp DiIJM2TjSy6SRmcFS8Ni1iGiJbca1xMtpx7fJsJD4Ix3tItRRe7iog1A+RdedezAKppt X0wybaxvZdmwOQocN4u5gPKAeb3ZekjrjhITlgVC2Jqt4UZitrqMXtZTG9PsHcYeUf5C F1ww== Received: by 10.66.75.202 with SMTP id e10mr28336048paw.55.1344365525076; Tue, 07 Aug 2012 11:52:05 -0700 (PDT) Received: from localhost.localdomain ([125.177.223.193]) by mx.google.com with ESMTPS id nu5sm11653536pbb.53.2012.08.07.11.52.00 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 11:52:03 -0700 (PDT) From: Dongjin Kim To: Subject: [PATCH v2] ODROID-X: hkdk4412: Add new hardware based on Exynos4412 Date: Wed, 8 Aug 2012 03:49:56 +0900 Message-Id: <1344365401-18591-1-git-send-email-dongjin.kim@agreeyamobility.net> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1344262254-14648-1-git-send-email-dongjin.kim@agreeyamobility.net> References: <1344262254-14648-1-git-send-email-dongjin.kim@agreeyamobility.net> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.213.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (tobetter[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Kukjin Kim , Russell King , Tony Lindgren , Jon Medhurst , linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Shawn Guo , linux-arm-kernel@lists.infradead.org, Dongjin Kim X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The HKDK4412 is the CPU module developed by Hardkernel which is based on Exynos 4412. mach_hkdk4412.c is to run on ODROID-X hardware and Machine ID (4289) is registered. Changes in v2: -. Change regulator's display names Change-Id: Iea6825a17b2e13f96bc6d892dd5135cad899b5df Signed-off-by: Dongjin Kim --- arch/arm/mach-exynos/Kconfig | 23 + arch/arm/mach-exynos/Makefile | 1 + arch/arm/mach-exynos/mach-hkdk4412.c | 964 ++++++++++++++++++++++++++++++++++ arch/arm/tools/mach-types | 1 + 4 files changed, 989 insertions(+) create mode 100644 arch/arm/mach-exynos/mach-hkdk4412.c diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index b5b4c8c..ae90773 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -54,6 +54,9 @@ config SOC_EXYNOS4412 default y depends on ARCH_EXYNOS4 select SAMSUNG_DMADEV + select S5P_PM if PM + select S5P_SLEEP if PM + select PM_GENERIC_DOMAINS help Enable EXYNOS4412 SoC support @@ -394,6 +397,26 @@ config MACH_SMDK4412 select MACH_SMDK4212 help Machine support for Samsung SMDK4412 + +config MACH_HKDK4412 + bool "HKDK4412" + select SOC_EXYNOS4412 + select MACH_SMDK4212 + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C_DEV_USB_HSOTG + select S5P_DEV_CSIS0 + select S5P_DEV_G2D + select S5P_DEV_JPEG + select S5P_DEV_USB_EHCI + select S5P_DEV_I2C_HDMIPHY + select S5P_DEV_TV + select S5P_GPIO_INT + select EXYNOS4_DEV_USB_OHCI + select SAMSUNG_DEV_ADC + help + Machine support for Odroid-X based on Samsung EXYNOS4412 + endif comment "Flattened Device Tree based board for EXYNOS SoCs" diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 9b58024..dccc381 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o +obj-$(CONFIG_MACH_HKDK4412) += mach-hkdk4412.o obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o diff --git a/arch/arm/mach-exynos/mach-hkdk4412.c b/arch/arm/mach-exynos/mach-hkdk4412.c new file mode 100644 index 0000000..0bd1e6d --- /dev/null +++ b/arch/arm/mach-exynos/mach-hkdk4412.c @@ -0,0 +1,964 @@ +/* + * linux/arch/arm/mach-exynos4/mach-hkdk4412.c + * + * Copyright (c) 2012 AgreeYa Mobility Co., Ltd. + * http://www.agreeyamobility.net + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" + +/* Following are default values for UCON, ULCON and UFCON UART registers */ +#define HKDK4412_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI | \ + S3C2443_UCON_RXERR_IRQEN) + +#define HKDK4412_ULCON_DEFAULT S3C2410_LCON_CS8 + +#define HKDK4412_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG4 | \ + S5PV210_UFCON_RXTRIG4) + +static struct s3c2410_uartcfg hkdk4412_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = HKDK4412_UCON_DEFAULT, + .ulcon = HKDK4412_ULCON_DEFAULT, + .ufcon = HKDK4412_UFCON_DEFAULT, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = HKDK4412_UCON_DEFAULT, + .ulcon = HKDK4412_ULCON_DEFAULT, + .ufcon = HKDK4412_UFCON_DEFAULT, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = HKDK4412_UCON_DEFAULT, + .ulcon = HKDK4412_ULCON_DEFAULT, + .ufcon = HKDK4412_UFCON_DEFAULT, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = HKDK4412_UCON_DEFAULT, + .ulcon = HKDK4412_ULCON_DEFAULT, + .ufcon = HKDK4412_UFCON_DEFAULT, + }, +}; + +static struct s3c_sdhci_platdata hkdk4412_hsmmc2_pdata __initdata = { + .cd_type = S3C_SDHCI_CD_INTERNAL, +#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT + .max_width = 8, + .host_caps = MMC_CAP_8_BIT_DATA, +#endif +}; + +static struct s3c_sdhci_platdata hkdk4412_hsmmc3_pdata __initdata = { + .cd_type = S3C_SDHCI_CD_INTERNAL, +}; + +static struct regulator_consumer_supply __initdata max77686_buck1_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_buck2_consumer[] = { + REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */ +}; + +static struct regulator_consumer_supply __initdata max77686_buck3_consumer[] = { + REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */ +}; + +static struct regulator_consumer_supply __initdata max77686_buck4_consumer[] = { + REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */ +}; + +static struct regulator_consumer_supply __initdata max77686_ldo1_consumer[] = { + REGULATOR_SUPPLY("vdd_alive", NULL), /* ALIVE */ +}; + +static struct regulator_consumer_supply __initdata max77686_ldo3_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo4_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo5_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo8_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo10_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo11_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo13_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo14_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo17_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo18_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo19_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo23_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo24_consumer[] = { +}; + +static struct regulator_consumer_supply __initdata max77686_ldo25_consumer[] = { + REGULATOR_SUPPLY("vddq_lcd", NULL), +}; + +static struct regulator_consumer_supply __initdata max77686_ldo26_consumer[] = { +}; + +static struct regulator_init_data __initdata max77686_buck1_data = { + .constraints = { + .name = "VDD_MIF_1.0V", + .min_uV = 800000, + .max_uV = 1050000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck1_consumer), + .consumer_supplies = max77686_buck1_consumer, +}; + +static struct regulator_init_data __initdata max77686_buck2_data = { + .constraints = { + .name = "VDD_ARM_1.3V", + .min_uV = 800000, + .max_uV = 1350000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck2_consumer), + .consumer_supplies = max77686_buck2_consumer, +}; + +static struct regulator_init_data __initdata max77686_buck3_data = { + .constraints = { + .name = "VDD_INT_1.0V", + .min_uV = 800000, + .max_uV = 1150000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck3_consumer), + .consumer_supplies = max77686_buck3_consumer, +}; + +static struct regulator_init_data __initdata max77686_buck4_data = { + .constraints = { + .name = "VDD_G3D_1.0V", + .min_uV = 850000, + .max_uV = 1200000, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_STATUS, + .state_mem = { + .disabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_buck4_consumer), + .consumer_supplies = max77686_buck4_consumer, +}; + +static struct regulator_init_data __initdata max77686_buck5_data = { + .constraints = { + .name = "VDDQ_CKEM1M2_1.2V", + .min_uV = 1200000, + .max_uV = 1200000, + .always_on = 1, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1200000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_buck6_data = { + .constraints = { + .name = "VDD_INL_1.35V", + .min_uV = 1350000, + .max_uV = 1350000, + .always_on = 1, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1350000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_buck7_data = { + .constraints = { + .name = "VDD_INL_2.0V", + .min_uV = 2000000, + .max_uV = 2000000, + .always_on = 1, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 2000000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_buck8_data = { + .constraints = { + .name = "VDD_BUCK8_2.8V", + .min_uV = 2800000, + .max_uV = 2800000, + .always_on = 1, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 2800000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_buck9_data = { + .constraints = { + .name = "VDD_BUCK9_1.2V", + .min_uV = 1200000, + .max_uV = 1200000, + .always_on = 1, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1200000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo1_data = { + .constraints = { + .name = "VDD_ALIVE_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo1_consumer), + .consumer_supplies = max77686_ldo1_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo2_data = { + .constraints = { + .name = "VDDQ_M1M2_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo3_data = { + .constraints = { + .name = "VDDQ_M0_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo3_consumer), + .consumer_supplies = max77686_ldo3_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo4_data = { + .constraints = { + .name = "VDDQ_MMC2_2.8V", + .min_uV = 2800000, + .max_uV = 2800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 2800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo4_consumer), + .consumer_supplies = max77686_ldo4_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo5_data = { + .constraints = { + .name = "VDDQ_MMC13_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo5_consumer), + .consumer_supplies = max77686_ldo5_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo6_data = { + .constraints = { + .name = "VDD_MPLL_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo7_data = { + .constraints = { + .name = "VDD_VPLL_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo8_data = { + .constraints = { + .name = "VDD10_HDMI_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo8_consumer), + .consumer_supplies = max77686_ldo8_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo9_data = { + .constraints = { + .name = "VDD_VTCORE_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo10_data = { + .constraints = { + .name = "VDDQ_MIPIHSI_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo10_consumer), + .consumer_supplies = max77686_ldo10_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo11_data = { + .constraints = { + .name = "VDD18_ABB1_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo11_consumer), + .consumer_supplies = max77686_ldo11_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo12_data = { + .constraints = { + .name = "VDD33_UOTG_3.3V", + .min_uV = 3300000, + .max_uV = 3300000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 3300000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo13_data = { + .constraints = { + .name = "VDDQ_C2C_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo13_consumer), + .consumer_supplies = max77686_ldo13_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo14_data = { + .constraints = { + .name = "VDD18_ABB2_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo14_consumer), + .consumer_supplies = max77686_ldo14_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo15_data = { + .constraints = { + .name = "VDD10_HSIC_1.0V", + .min_uV = 1000000, + .max_uV = 1000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1000000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo16_data = { + .constraints = { + .name = "VDD18_HSIC_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo17_data = { + .constraints = { + .name = "VDDQ_CAM_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo17_consumer), + .consumer_supplies = max77686_ldo17_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo18_data = { + .constraints = { + .name = "VDD_LDO18_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo18_consumer), + .consumer_supplies = max77686_ldo18_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo19_data = { + .constraints = { + .name = "VDD_VTCAM_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 0, + .always_on = 0, + .boot_on = 0, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 0, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo19_consumer), + .consumer_supplies = max77686_ldo19_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo20_data = { + .constraints = { + .name = "VDD_LDO20_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .always_on = 1, + .boot_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 1800000, + .enabled = 0, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo21_data = { + .constraints = { + .name = "VDD_SDCARD_3.3V", + .min_uV = 3300000, + .max_uV = 3300000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 3300000, + .enabled = 1, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo22_data = { + .constraints = { + .name = "VDD_LDO22_2.8V", + .min_uV = 2800000, + .max_uV = 2800000, + .apply_uV = 1, + .always_on = 0, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 2800000, + .enabled = 0, + }, + }, +}; + +static struct regulator_init_data __initdata max77686_ldo23_data = { + .constraints = { + .name = "VDD_TOUCH_2.8V", + .min_uV = 2800000, + .max_uV = 2800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 2800000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo23_consumer), + .consumer_supplies = max77686_ldo23_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo24_data = { + .constraints = { + .name = "VDD_TOUCHLED_3.3V", + .min_uV = 3300000, + .max_uV = 3300000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 3300000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo24_consumer), + .consumer_supplies = max77686_ldo24_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo25_data = { + .constraints = { + .name = "VDDQ_LCD_1.8V", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .disabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo25_consumer), + .consumer_supplies = max77686_ldo25_consumer, +}; + +static struct regulator_init_data __initdata max77686_ldo26_data = { + .constraints = { + .name = "VDD_MOTOR_3.0V", + .min_uV = 3000000, + .max_uV = 3000000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .state_mem = { + .uV = 3000000, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(max77686_ldo26_consumer), + .consumer_supplies = max77686_ldo26_consumer, +}; + +struct max77686_opmode_data max77686_opmode_data[MAX77686_REG_MAX] = { + [MAX77686_LDO11] = {MAX77686_LDO11, MAX77686_OPMODE_STANDBY}, + [MAX77686_LDO14] = {MAX77686_LDO14, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK1] = {MAX77686_BUCK1, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK2] = {MAX77686_BUCK2, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK3] = {MAX77686_BUCK3, MAX77686_OPMODE_STANDBY}, + [MAX77686_BUCK4] = {MAX77686_BUCK4, MAX77686_OPMODE_STANDBY}, +}; + +static struct max77686_regulator_data max77686_regulators[] = { + { MAX77686_LDO1, &max77686_ldo1_data }, + { MAX77686_LDO2, &max77686_ldo2_data }, + { MAX77686_LDO3, &max77686_ldo3_data }, + { MAX77686_LDO4, &max77686_ldo4_data }, + { MAX77686_LDO5, &max77686_ldo5_data }, + { MAX77686_LDO6, &max77686_ldo6_data }, + { MAX77686_LDO7, &max77686_ldo7_data }, + { MAX77686_LDO8, &max77686_ldo8_data }, + { MAX77686_LDO9, &max77686_ldo9_data }, + { MAX77686_LDO10, &max77686_ldo10_data }, + { MAX77686_LDO11, &max77686_ldo11_data }, + { MAX77686_LDO12, &max77686_ldo12_data }, + { MAX77686_LDO13, &max77686_ldo13_data }, + { MAX77686_LDO14, &max77686_ldo14_data }, + { MAX77686_LDO15, &max77686_ldo15_data }, + { MAX77686_LDO16, &max77686_ldo16_data }, + { MAX77686_LDO17, &max77686_ldo17_data }, + { MAX77686_LDO18, &max77686_ldo18_data }, + { MAX77686_LDO19, &max77686_ldo19_data }, + { MAX77686_LDO20, &max77686_ldo20_data }, + { MAX77686_LDO21, &max77686_ldo21_data }, + { MAX77686_LDO22, &max77686_ldo22_data }, + { MAX77686_LDO23, &max77686_ldo23_data }, + { MAX77686_LDO24, &max77686_ldo24_data }, + { MAX77686_LDO25, &max77686_ldo25_data }, + { MAX77686_LDO26, &max77686_ldo26_data }, + + { MAX77686_BUCK1, &max77686_buck1_data }, + { MAX77686_BUCK2, &max77686_buck2_data }, + { MAX77686_BUCK3, &max77686_buck3_data }, + { MAX77686_BUCK4, &max77686_buck4_data }, + { MAX77686_BUCK5, &max77686_buck5_data }, + { MAX77686_BUCK6, &max77686_buck6_data }, + { MAX77686_BUCK7, &max77686_buck7_data }, + { MAX77686_BUCK8, &max77686_buck8_data }, + { MAX77686_BUCK9, &max77686_buck9_data }, +}; + +static struct max77686_platform_data hkdk4412_max77686_info = { + .num_regulators = ARRAY_SIZE(max77686_regulators), + .regulators = max77686_regulators, + .irq_gpio = 0, + .wakeup = 0, + + .opmode_data = max77686_opmode_data, + + .buck234_gpio_dvs[0] = EXYNOS4_GPX2(3), + .buck234_gpio_dvs[1] = EXYNOS4_GPX2(4), + .buck234_gpio_dvs[2] = EXYNOS4_GPX2(5), + + .buck2_voltage[0] = 1300000, /* 1.3V */ + .buck2_voltage[1] = 1000000, /* 1.0V */ + .buck2_voltage[2] = 950000, /* 0.95V */ + .buck2_voltage[3] = 900000, /* 0.9V */ + .buck2_voltage[4] = 1000000, /* 1.0V */ + .buck2_voltage[5] = 1000000, /* 1.0V */ + .buck2_voltage[6] = 950000, /* 0.95V */ + .buck2_voltage[7] = 900000, /* 0.9V */ + + .buck3_voltage[0] = 1037500, /* 1.0375V */ + .buck3_voltage[1] = 1000000, /* 1.0V */ + .buck3_voltage[2] = 950000, /* 0.95V */ + .buck3_voltage[3] = 900000, /* 0.9V */ + .buck3_voltage[4] = 1000000, /* 1.0V */ + .buck3_voltage[5] = 1000000, /* 1.0V */ + .buck3_voltage[6] = 950000, /* 0.95V */ + .buck3_voltage[7] = 900000, /* 0.9V */ + + .buck4_voltage[0] = 1100000, /* 1.1V */ + .buck4_voltage[1] = 1000000, /* 1.0V */ + .buck4_voltage[2] = 950000, /* 0.95V */ + .buck4_voltage[3] = 900000, /* 0.9V */ + .buck4_voltage[4] = 1000000, /* 1.0V */ + .buck4_voltage[5] = 1000000, /* 1.0V */ + .buck4_voltage[6] = 950000, /* 0.95V */ + .buck4_voltage[7] = 900000, /* 0.9V */ +}; + +static struct i2c_board_info hkdk4412_i2c_devs0[] __initdata = { + { + I2C_BOARD_INFO("max77686", (0x12 >> 1)), + .platform_data = &hkdk4412_max77686_info, + } +}; + +static struct i2c_board_info hkdk4412_i2c_devs1[] __initdata = { +}; + +static struct i2c_board_info hkdk4412_i2c_devs3[] __initdata = { + /* nothing here yet */ +}; + +static struct i2c_board_info hkdk4412_i2c_devs7[] __initdata = { + /* nothing here yet */ +}; + +static struct gpio_led hkdk4412_gpio_leds[] = { + { + .name = "led1", /* D5 on ODROID-X */ + .default_trigger = "oneshot", + .gpio = EXYNOS4_GPC1(0), + .active_low = 1, + }, + { + .name = "led2", /* D6 on ODROID-X */ + .default_trigger = "heartbeat", + .gpio = EXYNOS4_GPC1(2), + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data hkdk4412_gpio_led_info = { + .leds = hkdk4412_gpio_leds, + .num_leds = ARRAY_SIZE(hkdk4412_gpio_leds), +}; + +static struct platform_device hkdk4412_leds_gpio = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &hkdk4412_gpio_led_info, + }, +}; + +/* USB EHCI */ +static struct s5p_ehci_platdata hkdk4412_ehci_pdata; + +static void __init hkdk4412_ehci_init(void) +{ + struct s5p_ehci_platdata *pdata = &hkdk4412_ehci_pdata; + + s5p_ehci_set_platdata(pdata); +} + +/* USB OHCI */ +static struct exynos4_ohci_platdata hkdk4412_ohci_pdata; + +static void __init hkdk4412_ohci_init(void) +{ + struct exynos4_ohci_platdata *pdata = &hkdk4412_ohci_pdata; + + exynos4_ohci_set_platdata(pdata); +} + +/* USB OTG */ +static struct s3c_hsotg_plat hkdk4412_hsotg_pdata; + +static struct platform_device *hkdk4412_devices[] __initdata = { + &s3c_device_hsmmc2, + &s3c_device_hsmmc3, + &s3c_device_i2c0, + &s3c_device_i2c1, + &s3c_device_i2c3, + &s3c_device_i2c7, + &s3c_device_rtc, + &s3c_device_usb_hsotg, + &s3c_device_wdt, + &s5p_device_ehci, + &s5p_device_fimc0, + &s5p_device_fimc1, + &s5p_device_fimc2, + &s5p_device_fimc3, + &s5p_device_fimc_md, + &s5p_device_mfc, + &s5p_device_mfc_l, + &s5p_device_mfc_r, + &exynos4_device_ohci, + &hkdk4412_leds_gpio, +}; + +static void __init hkdk4412_map_io(void) +{ + clk_xusbxti.rate = 24000000; + + exynos_init_io(NULL, 0); + s3c24xx_init_clocks(clk_xusbxti.rate); + s3c24xx_init_uarts(hkdk4412_uartcfgs, ARRAY_SIZE(hkdk4412_uartcfgs)); +} + +static void __init hkdk4412_reserve(void) +{ + s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); +} + +static void __init hkdk4412_gpio_init(void) +{ + /* Peripheral power enable (P3V3) */ + gpio_request_one(EXYNOS4_GPA1(1), GPIOF_OUT_INIT_HIGH, "p3v3_en"); +} + +static void __init hkdk4412_machine_init(void) +{ + hkdk4412_gpio_init(); + + s3c_i2c0_set_platdata(NULL); + i2c_register_board_info(0, hkdk4412_i2c_devs0, + ARRAY_SIZE(hkdk4412_i2c_devs0)); + + s3c_i2c1_set_platdata(NULL); + i2c_register_board_info(1, hkdk4412_i2c_devs1, + ARRAY_SIZE(hkdk4412_i2c_devs1)); + + s3c_i2c3_set_platdata(NULL); + i2c_register_board_info(3, hkdk4412_i2c_devs3, + ARRAY_SIZE(hkdk4412_i2c_devs3)); + + s3c_i2c7_set_platdata(NULL); + i2c_register_board_info(7, hkdk4412_i2c_devs7, + ARRAY_SIZE(hkdk4412_i2c_devs7)); + + s3c_sdhci2_set_platdata(&hkdk4412_hsmmc2_pdata); + s3c_sdhci3_set_platdata(&hkdk4412_hsmmc3_pdata); + + hkdk4412_ehci_init(); + hkdk4412_ohci_init(); + s3c_hsotg_set_platdata(&hkdk4412_hsotg_pdata); + + platform_add_devices(hkdk4412_devices, ARRAY_SIZE(hkdk4412_devices)); +} + +MACHINE_START(ODROIDX, "ODROID-X") + /* Maintainer: Dongjin Kim */ + .atag_offset = 0x100, + .init_irq = exynos4_init_irq, + .map_io = hkdk4412_map_io, + .handle_irq = gic_handle_irq, + .init_machine = hkdk4412_machine_init, + .init_late = exynos_init_late, + .timer = &exynos4_timer, + .restart = exynos4_restart, + .reserve = &hkdk4412_reserve, +MACHINE_END diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 2997e56..e80ed9f 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -1206,3 +1206,4 @@ baileys MACH_BAILEYS BAILEYS 4169 familybox MACH_FAMILYBOX FAMILYBOX 4170 ensemble_mx35 MACH_ENSEMBLE_MX35 ENSEMBLE_MX35 4171 sc_sps_1 MACH_SC_SPS_1 SC_SPS_1 4172 +odroidx MACH_ODROIDX ODROIDX 4289