From patchwork Fri Aug 10 13:02:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe PLAGNIOL-VILLARD X-Patchwork-Id: 1305471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B7EBF3FC33 for ; Fri, 10 Aug 2012 13:09:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SzosY-0005st-DT; Fri, 10 Aug 2012 13:03:50 +0000 Received: from 14.mo4.mail-out.ovh.net ([46.105.40.29] helo=mo4.mail-out.ovh.net) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Szoqv-0005Iu-M4 for linux-arm-kernel@lists.infradead.org; Fri, 10 Aug 2012 13:02:17 +0000 Received: from mail628.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo4.mail-out.ovh.net (Postfix) with SMTP id 0B75B10500B7 for ; Fri, 10 Aug 2012 15:06:42 +0200 (CEST) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 10 Aug 2012 15:02:20 +0200 Received: from ns32433.ovh.net (HELO localhost) (plagnioj%jcrosoft.com@213.251.161.87) by ns0.ovh.net with SMTP; 10 Aug 2012 15:02:18 +0200 From: Jean-Christophe PLAGNIOL-VILLARD To: linux-arm-kernel@lists.infradead.org X-Ovh-Mailout: 178.32.228.4 (mo4.mail-out.ovh.net) Subject: [PATCH 13/14] arm: at91: dt: at91sam9 add nand pinctrl support Date: Fri, 10 Aug 2012 15:02:10 +0200 Message-Id: <1344603731-32667-13-git-send-email-plagnioj@jcrosoft.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1344603731-32667-1-git-send-email-plagnioj@jcrosoft.com> References: <20120810124820.GA20557@game.jcrosoft.org> <1344603731-32667-1-git-send-email-plagnioj@jcrosoft.com> X-Ovh-Tracer-Id: 457678312970169341 X-Ovh-Remote: 213.251.161.87 (ns32433.ovh.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-OVH-SPAMSTATE: OK X-OVH-SPAMSCORE: -100 X-OVH-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeegledrudejucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfhrhhomheplfgvrghnqdevhhhrihhsthhophhhvgcurffntefipffkqffnqdggkffnnfettfffuceophhlrghgnhhiohhjsehjtghrohhsohhfthdrtghomheqnecujfgurhephffvufffkffojghfsedttdertdertddt X-Spam-Check: DONE|U 0.5/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeegledrudejucetufdoteggodetrfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfhrhhomheplfgvrghnqdevhhhrihhsthhophhhvgcurffntefipffkqffnqdggkffnnfettfffuceophhlrghgnhhiohhjsehjtghrohhsohhfthdrtghomheqnecujfgurhephffvufffkffojghfsedttdertdertddt X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [46.105.40.29 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Nicolas Ferre , Linus Walleij , Jean-Christophe PLAGNIOL-VILLARD X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Cc: Linus Walleij Cc: Nicolas Ferre Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- arch/arm/boot/dts/at91sam9260.dtsi | 10 ++++++++++ arch/arm/boot/dts/at91sam9263.dtsi | 10 ++++++++++ arch/arm/boot/dts/at91sam9g45.dtsi | 10 ++++++++++ arch/arm/boot/dts/at91sam9n12.dtsi | 10 ++++++++++ arch/arm/boot/dts/at91sam9x5.dtsi | 10 ++++++++++ 5 files changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 8ee7cd3..a4f4cba 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -208,6 +208,14 @@ }; }; + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ + 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ + }; + }; + pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; @@ -370,6 +378,8 @@ >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; gpios = <&pioC 13 0 &pioC 14 0 0 diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 2d054c2..9314c32 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -155,6 +155,14 @@ }; }; + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ + 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -267,6 +275,8 @@ >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; gpios = <&pioA 22 0 &pioD 15 0 0 diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index cfe197a..8863fd9 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -188,6 +188,14 @@ }; }; + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/ + 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -341,6 +349,8 @@ >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; gpios = <&pioC 8 0 &pioC 14 0 0 diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 36a6ce0..d1f5655 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -190,6 +190,14 @@ }; }; + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ + 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ + }; + }; + pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; @@ -292,6 +300,8 @@ >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; gpios = <&pioD 5 0 &pioD 4 0 0 diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index c585f04..e58965d6 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -204,6 +204,14 @@ }; }; + nand { + pinctrl_nand: nand-0 { + atmel,pins = + <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ + 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ + }; + }; + pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; @@ -346,6 +354,8 @@ >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; gpios = <&pioD 5 0 &pioD 4 0 0