From patchwork Fri Aug 17 06:51:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 1337381 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B4C703FC33 for ; Fri, 17 Aug 2012 06:54:49 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T2GP8-0003Xz-Mo; Fri, 17 Aug 2012 06:51:34 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T2GP5-0003Xl-PE for linux-arm-kernel@lists.infradead.org; Fri, 17 Aug 2012 06:51:32 +0000 Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Thu, 16 Aug 2012 23:50:49 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Thu, 16 Aug 2012 23:51:28 -0700 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Thu, 16 Aug 2012 23:51:28 -0700 Received: from localhost.localdomain (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.264.0; Thu, 16 Aug 2012 23:51:27 -0700 From: Joseph Lo To: Stephen Warren , Olof Johansson , Colin Cross Subject: [PATCH] ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30 Date: Fri, 17 Aug 2012 14:51:21 +0800 Message-ID: <1345186281-3859-1-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.7.0.4 X-NVConfidentiality: public MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Currently the tegra20 and tegra30 share the same symbol for tegra_clk_32k_ops. This will cause a compile error when building a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and modify tegra30_clk_32k_ops for tegra30. Signed-off-by: Joseph Lo --- arch/arm/mach-tegra/tegra20_clocks.c | 10 ++++++++++ arch/arm/mach-tegra/tegra30_clocks.c | 2 +- arch/arm/mach-tegra/tegra30_clocks.h | 2 +- arch/arm/mach-tegra/tegra30_clocks_data.c | 2 +- 4 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/tegra20_clocks.c b/arch/arm/mach-tegra/tegra20_clocks.c index b073396..ee6922b 100644 --- a/arch/arm/mach-tegra/tegra20_clocks.c +++ b/arch/arm/mach-tegra/tegra20_clocks.c @@ -240,6 +240,16 @@ static int clk_div16_get_divider(unsigned long parent_rate, unsigned long rate) return divider_u16 - 1; } +static unsigned long tegra_clk_fixed_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return to_clk_tegra(hw)->fixed_rate; +} + +struct clk_ops tegra_clk_32k_ops = { + .recalc_rate = tegra_clk_fixed_recalc_rate, +}; + /* clk_m functions */ static unsigned long tegra20_clk_m_recalc_rate(struct clk_hw *hw, unsigned long prate) diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index b2d0864..7dad44d 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -489,7 +489,7 @@ static unsigned long tegra30_clk_fixed_recalc_rate(struct clk_hw *hw, return to_clk_tegra(hw)->fixed_rate; } -struct clk_ops tegra_clk_32k_ops = { +struct clk_ops tegra30_clk_32k_ops = { .recalc_rate = tegra30_clk_fixed_recalc_rate, }; diff --git a/arch/arm/mach-tegra/tegra30_clocks.h b/arch/arm/mach-tegra/tegra30_clocks.h index aeb4e96..b08b8d9 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.h +++ b/arch/arm/mach-tegra/tegra30_clocks.h @@ -17,7 +17,7 @@ #ifndef __MACH_TEGRA30_CLOCK_H #define __MACH_TEGRA30_CLOCK_H -extern struct clk_ops tegra_clk_32k_ops; +extern struct clk_ops tegra30_clk_32k_ops; extern struct clk_ops tegra30_clk_m_ops; extern struct clk_ops tegra_clk_m_div_ops; extern struct clk_ops tegra_pll_ref_ops; diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index dad1b2f..2271ac1 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c @@ -58,7 +58,7 @@ static struct clk_tegra tegra_clk_32k_hw = { static struct clk tegra_clk_32k = { .name = "clk_32k", .hw = &tegra_clk_32k_hw.hw, - .ops = &tegra_clk_32k_ops, + .ops = &tegra30_clk_32k_ops, .flags = CLK_IS_ROOT, };